On Wed, 28 Oct 2020 19:49:52 +0800
Du Huanpeng <u74147@xxxxxxxxx> wrote:
> add "pll" and "oscillator" node to devicetree.
>
> Signed-off-by: Du Huanpeng <u74147@xxxxxxxxx>
...
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 7a8f010..0aceed3 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -118,6 +118,15 @@ config MACH_MIPS_BCM47XX
>
> config MACH_MIPS_LOONGSON
> bool "Loongson-based boards"
> + select SYS_HAS_CPU_MIPS32_R2
> + select SYS_SUPPORTS_32BIT_KERNEL
> + select CSRC_R4K_LIB
> + select HAS_DEBUG_LL
> + select COMMON_CLK
> + select COMMON_CLK_OF_PROVIDER
> + select CLKDEV_LOOKUP
> + select OFTREE
> + select GPIOLIB
I suppose that arch/mips/ changes should go to a separate patch.
E.g.:
* PATCH 001: clk: ls1b200: add clk driver for loongson 1b
* PATCH 002: MIPS: ls1b200: use clk driver
>
> config MACH_MIPS_XBURST
> bool "Ingenic XBurst-based boards"
> diff --git a/arch/mips/dts/loongson-ls1b.dts b/arch/mips/dts/loongson-ls1b.dts
> index 6b53311..89cce56 100644
> --- a/arch/mips/dts/loongson-ls1b.dts
> +++ b/arch/mips/dts/loongson-ls1b.dts
> @@ -6,6 +6,12 @@
> model = "Loongson Tech LS1B Demo Board";
> compatible = "loongson,ls1b";
>
> + oscillator: oscillator {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <33000000>;
> + };
> +
> memory@0 {
> device_type = "memory";
> reg = <0x00000000 0x4000000>;
> diff --git a/arch/mips/dts/ls1b.dtsi b/arch/mips/dts/ls1b.dtsi
> index cb85814..8b772af 100644
> --- a/arch/mips/dts/ls1b.dtsi
> +++ b/arch/mips/dts/ls1b.dtsi
> @@ -1,3 +1,5 @@
> +#include <dt-bindings/clock/ls1b-clk.h>
> +
> / {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -40,5 +42,12 @@
> clock-frequency = <83000000>;
> status = "disabled";
> };
> +
> + pll: pll@1fe78030 {
> + compatible = "loongson,ls1b-pll";
> + #clock-cells = <1>;
> + reg = <0x1fe78030 0x8>;
> + clocks = <&oscillator>;
> + };
> };
> };
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index 0903274..04c797e 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -19,4 +19,5 @@ obj-$(CONFIG_ARCH_IMX) += imx/
> obj-$(CONFIG_COMMON_CLK_AT91) += at91/
> obj-$(CONFIG_ARCH_STM32MP) += clk-stm32mp1.o
> obj-$(CONFIG_MACH_VEXPRESS) += vexpress/
> +obj-$(CONFIG_MACH_MIPS_LOONGSON)+= loongson/
> obj-$(CONFIG_ARCH_LAYERSCAPE) += clk-qoric.o
> diff --git a/drivers/clk/loongson/Makefile b/drivers/clk/loongson/Makefile
> new file mode 100644
> index 0000000..dd76b25
> --- /dev/null
> +++ b/drivers/clk/loongson/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_BOARD_LOONGSON_TECH_LS1B) += clk-ls1b200.o
> +
> diff --git a/drivers/clk/loongson/clk-ls1b200.c b/drivers/clk/loongson/clk-ls1b200.c
> new file mode 100644
> index 0000000..f5fabd4
> --- /dev/null
> +++ b/drivers/clk/loongson/clk-ls1b200.c
> @@ -0,0 +1,154 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2014 Antony Pavlov <antonynpavlov@xxxxxxxxx>
> + * Copyright (C) 2020 Du Huanpeng <u74147@xxxxxxxxx>
> + *
> + * Based on the Linux ath79 clock code
Thanks for mentioning me, but I have not contributed to clk-ls1b200.c :)
Could you please remove my copyright and just write "Based on the ath79 clock code by Antony Pavlov...".
--
Best regards,
Antony Pavlov
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