On Mon, 2020-10-05 at 11:53 +0200, Sascha Hauer wrote:
> The i.MX8MQ has a Cortex-M7 Coprocessor. Add a node for controlling
Copy paste error from MX8MP ^ schould be Cortex-M4.
> it.
> To make use of it the board has to provide the reserved memory nodes,
> for example:
>
> reserved-memory {
> #address-cells = <2>;
> #size-cells = <2>;
> ranges;
>
> m4_reserved: m7@0x40000000 {
> no-map;
> reg = <0 0x40000000 0 0x1000000>;
> };
>
> m4_reserved_sysmem3: rproc@80000000 {
> reg = <0 0x80000000 0 0x800000>;
> no-map;
> };
> };
>
> &remoteproc_cm4 {
> memory-region = <&m4_reserved>, <&m4_reserved_sysmem3>;
> };
>
> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> ---
> arch/arm/dts/imx8mq.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
> index 5f2df35bc9..ec8347f38f 100644
> --- a/arch/arm/dts/imx8mq.dtsi
> +++ b/arch/arm/dts/imx8mq.dtsi
> @@ -4,6 +4,14 @@
> * Copyright (C) 2017 Pengutronix, Lucas Stach <
> kernel@xxxxxxxxxxxxxx>
> */
>
> +/ {
> + remoteproc_cm4: remoteproc-cm4 {
> + compatible = "fsl,imx8mq-cm4";
> + clocks = <&clk IMX8MQ_CLK_M4_CORE>;
> + syscon = <&src>;
> + };
> +};
> +
> &clk {
> assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>,
> <&clk IMX8MQ_CLK_USDHC2>,
Regards,
Rouven
_______________________________________________
barebox mailing list
barebox@xxxxxxxxxxxxxxxxxxx
http://lists.infradead.org/mailman/listinfo/barebox
