Before booting, we must make sure the I-cache is synchronized with the D-cache to execute loaded instructions. In order to do that, add a function which execute a fence to ensure every memory accesses have been committed out of processor pipeline to memory and then invalidate I-cache to reload from memory. Signed-off-by: Clement Leger <cleger@xxxxxxxxx> --- arch/kvx/include/asm/cache.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 arch/kvx/include/asm/cache.h diff --git a/arch/kvx/include/asm/cache.h b/arch/kvx/include/asm/cache.h new file mode 100644 index 000000000..3be176725 --- /dev/null +++ b/arch/kvx/include/asm/cache.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2019 Kalray Inc. + */ + +#ifndef __KVX_CACHE_H +#define __KVX_CACHE_H + +#include <linux/types.h> + +static inline void sync_caches_for_execution(void) +{ + __builtin_kvx_fence(); + __builtin_kvx_iinval(); + __builtin_kvx_barrier(); +} + +#endif /* __KVX_CACHE_H */ -- 2.17.1 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox