The attributes should be set to avoid speculative access to memory-mapped peripherals. The patch has been tested with: noinline unsigned long nox(void) { return get_pc(); } static void xn_test(void) { void *adr = (void *)SOME_SRAM_ADDRESS; unsigned long ret; unsigned long (*fn)(void) = adr; memcpy(adr, nox, 0x1000); sync_caches_for_execution(); ret = fn(); printf("pc: 0x%08lx\n", ret); } Without this patch nox() gets executed in SRAM, with it runs into a abort as expected. Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- Changes since v1: - Select correct PXN/UXN bits based on current exception level arch/arm/cpu/mmu_64.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/mmu_64.h b/arch/arm/cpu/mmu_64.h index a2a5477569..f5b7624037 100644 --- a/arch/arm/cpu/mmu_64.h +++ b/arch/arm/cpu/mmu_64.h @@ -6,7 +6,8 @@ PTE_BLOCK_AF) #define UNCACHED_MEM (PTE_BLOCK_MEMTYPE(MT_DEVICE_nGnRnE) | \ PTE_BLOCK_OUTER_SHARE | \ - PTE_BLOCK_AF) + PTE_BLOCK_AF | \ + PTE_BLOCK_UXN) /* * Do it the simple way for now and invalidate the entire tlb -- 2.26.0.rc2 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox