This adds a Zynq specific CPU lowlevel init function, which applies
the required workarounds for the Cortex A9 r3p0 core.
Signed-off-by: Lucas Stach <dev@xxxxxxxxxx>
---
arch/arm/mach-zynq/Makefile | 1 +
arch/arm/mach-zynq/cpu_init.c | 15 +++++++++++++++
arch/arm/mach-zynq/include/mach/init.h | 8 ++++++++
3 files changed, 24 insertions(+)
create mode 100644 arch/arm/mach-zynq/cpu_init.c
create mode 100644 arch/arm/mach-zynq/include/mach/init.h
diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
index c88ab4666f0f..06c2ce996cfa 100644
--- a/arch/arm/mach-zynq/Makefile
+++ b/arch/arm/mach-zynq/Makefile
@@ -1 +1,2 @@
obj-y += zynq.o bootm-zynqimg.o
+lwl-y += cpu_init.o
diff --git a/arch/arm/mach-zynq/cpu_init.c b/arch/arm/mach-zynq/cpu_init.c
new file mode 100644
index 000000000000..ec5ee59e169d
--- /dev/null
+++ b/arch/arm/mach-zynq/cpu_init.c
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <common.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/errata.h>
+#include <mach/init.h>
+
+void zynq_cpu_lowlevel_init(void)
+{
+ arm_cpu_lowlevel_init();
+
+ enable_arm_errata_761320_war();
+ enable_arm_errata_794072_war();
+ enable_arm_errata_845369_war();
+}
diff --git a/arch/arm/mach-zynq/include/mach/init.h b/arch/arm/mach-zynq/include/mach/init.h
new file mode 100644
index 000000000000..c458f602e4d7
--- /dev/null
+++ b/arch/arm/mach-zynq/include/mach/init.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __MACH_INIT_H
+#define __MACH_INIT_H
+
+void zynq_cpu_lowlevel_init(void);
+
+#endif
--
2.24.1
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