Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
Cc: Chris Healy <cphealy@xxxxxxxxx>
Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
---
arch/arm/mach-imx/imx8mq.c | 7 +++++++
arch/arm/mach-imx/include/mach/imx8mq.h | 2 ++
2 files changed, 9 insertions(+)
diff --git a/arch/arm/mach-imx/imx8mq.c b/arch/arm/mach-imx/imx8mq.c
index 089344528d..d06ba098c3 100644
--- a/arch/arm/mach-imx/imx8mq.c
+++ b/arch/arm/mach-imx/imx8mq.c
@@ -20,6 +20,7 @@
#include <mach/revision.h>
#include <mach/imx8mq.h>
#include <mach/reset-reason.h>
+#include <mach/ocotp.h>
#include <linux/iopoll.h>
#include <linux/arm-smccc.h>
@@ -27,6 +28,11 @@
#define FSL_SIP_BUILDINFO 0xC2000003
#define FSL_SIP_BUILDINFO_GET_COMMITHASH 0x00
+u64 imx8mq_uid(void)
+{
+ return imx_ocotp_read_uid(IOMEM(MX8MQ_OCOTP_BASE_ADDR));
+}
+
int imx8mq_init(void)
{
void __iomem *anatop = IOMEM(MX8MQ_ANATOP_BASE_ADDR);
@@ -52,6 +58,7 @@ int imx8mq_init(void)
* Reset reasons seem to be identical to that of i.MX7
*/
imx_set_reset_reason(src + IMX7_SRC_SRSR, imx7_reset_reasons);
+ pr_info("%s unique ID: %llx\n", cputypestr, imx8mq_uid());
if (IS_ENABLED(CONFIG_ARM_SMCCC) &&
IS_ENABLED(CONFIG_FIRMWARE_IMX8MQ_ATF)) {
diff --git a/arch/arm/mach-imx/include/mach/imx8mq.h b/arch/arm/mach-imx/include/mach/imx8mq.h
index 08dc06fdb4..c085894ef7 100644
--- a/arch/arm/mach-imx/include/mach/imx8mq.h
+++ b/arch/arm/mach-imx/include/mach/imx8mq.h
@@ -49,4 +49,6 @@ static inline int imx8mq_cpu_revision(void)
return revision;
}
+u64 imx8mq_uid(void);
+
#endif /* __MACH_IMX8_H */
\ No newline at end of file
--
2.21.0
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