On Mon, 2019-08-05 at 12:37 +0200, Lucas Stach wrote: > Am Montag, den 05.08.2019, 11:23 +0200 schrieb Rouven Czerwinski: > > /* > > * Power-on execution flow of start_nxp_imx8mq_evk() might not be > > * obvious for a very first read, so here's, hopefully helpful, > > @@ -75,53 +84,53 @@ static void nxp_imx8mq_evk_sram_setup(void) > > * 1. MaskROM uploads PBL into OCRAM and that's where this > > function is > > * executed for the first time > > * > > - * 2. DDR is initialized and full i.MX image is loaded to the > > - * beginning of RAM > > - * > > - * 3. start_nxp_imx8mq_evk, now in RAM, is executed again > > + * 2. DDR is initialized and the TF-A trampoline is installed in > > the > > + * DRAM. > > * > > - * 4. BL31 blob is uploaded to OCRAM and the control is transfer > > to it > > + * 3. TF-A is executed and exits into the trampoline in RAM, which > > enters the > > + * PBL for the second time. DRAM setup done is indicated by a > > one in register > > + * x0 by the trampoline > > Why change this and add additional register state here? Checking for > EL2 should work fine for this. Correct, I'll gladly remove the register state and use current_el(). This was a leftover from a previous version where the entry function was called after DRAM setup, but this is clearly no longer needed. Regards, Rouven Czerwinski -- Pengutronix e.K. | | Industrial Linux Solutions | https://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
