On Tue, Jul 02, 2019 at 02:37:41PM +0200, Stefan Riedmueller wrote:
> From: Daniel Schultz <d.schultz@xxxxxxxxx>
>
> Add the state framework with EEPROM backend.
>
> Signed-off-by: Stefan Riedmueller <s.riedmueller@xxxxxxxxx>
Missing S-o-b from Daniel
> ---
> arch/arm/dts/imx6ul-phytec-phycore-som.dts | 5 ++
> arch/arm/dts/imx6ul-phytec-state.dtsi | 81 +++++++++++++++++++++++++++++
> arch/arm/dts/imx6ull-phytec-phycore-som.dts | 5 ++
> 3 files changed, 91 insertions(+)
> create mode 100644 arch/arm/dts/imx6ul-phytec-state.dtsi
>
> diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dts b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
> index 6d1876702d1b..11418ea7f038 100644
> --- a/arch/arm/dts/imx6ul-phytec-phycore-som.dts
> +++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
> @@ -14,6 +14,7 @@
>
> #include <arm/imx6ul.dtsi>
> #include "imx6ul-phytec-phycore-som.dtsi"
> +#include "imx6ul-phytec-state.dtsi"
>
> / {
> model = "Phytec phyCORE-i.MX6 Ultra Lite SOM";
> @@ -32,6 +33,10 @@
> status = "okay";
> };
>
> +&state {
> + status = "okay";
> +};
> +
> &uart1 {
> status = "okay";
> };
> diff --git a/arch/arm/dts/imx6ul-phytec-state.dtsi b/arch/arm/dts/imx6ul-phytec-state.dtsi
> new file mode 100644
> index 000000000000..a21cb49f00ce
> --- /dev/null
> +++ b/arch/arm/dts/imx6ul-phytec-state.dtsi
> @@ -0,0 +1,81 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2019 PHYTEC Messtechnik GmbH,
> + * Author: Stefan Riedmueller <s.riedmueller@xxxxxxxxx>
> + */
> +
> +/ {
> + aliases {
> + state = &state;
> + };
> +
> + state: imx6ul_phytec_boot_state {
> + magic = <0x883b86a6>;
> + compatible = "barebox,state";
> + backend-type = "raw";
> + backend = <&backend_update_eeprom>;
> + backend-stridesize = <54>;
> + status = "disabled";
Same here too for missing backend-storage-type.
- Roland
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + bootstate {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + last_chosen {
> + reg = <0x0 0x4>;
> + type = "uint32";
> + };
> + system0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + remaining_attempts {
> + reg = <0x4 0x4>;
> + type = "uint32";
> + default = <3>;
> + };
> + priority {
> + reg = <0x8 0x4>;
> + type = "uint32";
> + default = <21>;
> + };
> + ok {
> + reg = <0xc 0x4>;
> + type = "uint32";
> + default = <0>;
> + };
> + };
> + system1 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + remaining_attempts {
> + reg = <0x10 0x4>;
> + type = "uint32";
> + default = <3>;
> + };
> + priority {
> + reg = <0x14 0x4>;
> + type = "uint32";
> + default = <20>;
> + };
> + ok {
> + reg = <0x18 0x4>;
> + type = "uint32";
> + default = <0>;
> + };
> + };
> + };
> + };
> +};
> +
> +&eeprom {
> + partitions {
> + compatible = "fixed-partitions";
> + #size-cells = <1>;
> + #address-cells = <1>;
> + backend_update_eeprom: state@0 {
> + reg = <0x0 0x100>;
> + label = "update-eeprom";
> + };
> + };
> +};
> diff --git a/arch/arm/dts/imx6ull-phytec-phycore-som.dts b/arch/arm/dts/imx6ull-phytec-phycore-som.dts
> index 4d73010131ee..86f43a4632a7 100644
> --- a/arch/arm/dts/imx6ull-phytec-phycore-som.dts
> +++ b/arch/arm/dts/imx6ull-phytec-phycore-som.dts
> @@ -14,6 +14,7 @@
>
> #include <arm/imx6ull.dtsi>
> #include "imx6ul-phytec-phycore-som.dtsi"
> +#include "imx6ul-phytec-state.dtsi"
>
> / {
> model = "Phytec phyCORE-i.MX6 ULL SOM";
> @@ -32,6 +33,10 @@
> status = "okay";
> };
>
> +&state {
> + status = "okay";
> +};
> +
> &uart1 {
> status = "okay";
> };
> --
> 2.7.4
>
>
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--
Roland Hieber | r.hieber@xxxxxxxxxxxxxx |
Pengutronix e.K. | https://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim | Phone: +49-5121-206917-5086 |
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