On Tue, May 21, 2019 at 8:56 AM Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> wrote:
>
> From: Fabio Estevam <fabio.estevam@xxxxxxx>
>
> Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk
> tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to
> enter the ldb_di_ipu_div divider. If the divider gets locked up, no
> ldb_di[x]_clk is generated, and the LVDS display will hang when the
> ipu_di_clk is sourced from ldb_di_clk.
>
> To fix the problem, both the new and current parent of the ldb_di_clk
> should be disabled before the switch. This patch ensures that correct
> steps are followed when ldb_di_clk parent is switched in the beginning
> of boot. The glitchy muxes are then registered as read-only. The clock
> parent can be selected using the assigned-clocks and
> assigned-clock-parents properties of the ccm device tree node:
>
> &clks {
> assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
> assigned-clock-parents = <&clks IMX6QDL_CLK_MMDC_CH1_AXI>,
> <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
> };
>
> The issue is explained in detail in EB821 ("LDB Clock Switch Procedure &
> i.MX6 Asynchronous Clock Switching Guidelines") [1].
>
> [1] http://www.nxp.com/files/32bit/doc/eng_bulletin/EB821.pdf
>
> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@xxxxxxx>
> Signed-off-by: Fabio Estevam <fabio.estevam@xxxxxxx>
> Signed-off-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
> Reviewed-by: Akshay Bhat <akshay.bhat@xxxxxxxxxxx>
> Tested-by Joshua Clayton <stillcompiling@xxxxxxxxx>
> Tested-by: Charles Kang <Charles.Kang@xxxxxxxxxxxxxxxx>
> Signed-off-by: Shawn Guo <shawnguo@xxxxxxxxxx>
> [afa: ported to barebox from Linux commit 5d283b0838]
> Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
> ---
> drivers/clk/imx/clk-imx6.c | 264 ++++++++++++++++++++++++++++++++++++-
> 1 file changed, 261 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c
> index 22f33aee03e9..69586f04a21f 100644
> --- a/drivers/clk/imx/clk-imx6.c
> +++ b/drivers/clk/imx/clk-imx6.c
> @@ -64,6 +64,12 @@ static inline int cpu_is_plus(void)
> return cpu_is_mx6qp() || cpu_is_mx6dp();
> }
>
> +/* Audio/Video PLL post dividers don't work on i.MX6q revision 1.0 */
> +static inline int cpu_has_working_video_pll_post_div(void) {
Another { that should be on a new line.
> + return !((cpu_is_mx6q() || cpu_is_mx6d()) &&
> + imx_silicon_revision() == IMX_CHIP_REV_1_0);
Same story with cpu_is_mx6*() here. Imx_silicon_revision() depends on
imx_init() being called as well AFAIU.
Thanks,
Andrey Smirnov
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