Hi Ahmad. On Tue, Apr 23, 2019 at 07:18:49PM +0200, Ahmad Fatoum wrote: > The Cortex-A7 in both the i.MX6UL[1] and i.MX6ULL[2] is affected by the > errata ERR008958 "Arm/MP: 814220—B-Cache maintenance by set/way operations > can execute out of order". > > select ARM_ERRATA_814220 to address this. > > [1]: https://www.nxp.com/docs/en/errata/IMX6ULCE.pdf > [2]: https://www.nxp.com/docs/en/errata/IMX6ULLCE.pdf > > Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> > --- > arch/arm/mach-imx/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig > index d47dd3547712..b15e6dfdfd9b 100644 > --- a/arch/arm/mach-imx/Kconfig > +++ b/arch/arm/mach-imx/Kconfig > @@ -164,6 +164,7 @@ config ARCH_IMX6SX > config ARCH_IMX6UL > bool > select ARCH_IMX6 > + select ARM_ERRATA_814220 Selecting a visible option is considered bad practice. If ARM_ERRATA_814220 was defined without a prompt it would have been fine. Sam _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
