[PATCH 10/14] clk: mux: Support CLK_SET_RATE_NO_REPARENT flag

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Since barebox doesn't do reparenting on rate changes we only have
to define the flag.

Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
 drivers/clk/rockchip/clk-rk3188.c | 2 --
 drivers/clk/rockchip/clk-rk3288.c | 2 --
 include/linux/clk.h               | 1 +
 3 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 8ed3a6d894..9340739945 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -25,8 +25,6 @@
 #define RK3066_GRF_SOC_STATUS	0x15c
 #define RK3188_GRF_SOC_STATUS	0xac
 
-#define CLK_SET_RATE_NO_REPARENT 0
-
 enum rk3188_plls {
 	apll, cpll, dpll, gpll,
 };
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index e7cc9c1b5b..dcfaae2407 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -25,8 +25,6 @@
 #define RK3288_GRF_SOC_CON(x)	(0x244 + x * 4)
 #define RK3288_GRF_SOC_STATUS1	0x284
 
-#define CLK_SET_RATE_NO_REPARENT 0
-
 enum rk3288_plls {
 	apll, dpll, cpll, gpll, npll,
 };
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 2492608a15..b9c5e0ab04 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -286,6 +286,7 @@ static inline void clk_put(struct clk *clk)
 
 #define CLK_SET_RATE_PARENT     (1 << 0) /* propagate rate change up one level */
 #define CLK_IGNORE_UNUSED       (1 << 3) /* do not gate even if unused */
+#define CLK_SET_RATE_NO_REPARENT (1 << 7) /* don't re-parent on rate change */
 #define CLK_IS_CRITICAL         (1 << 11) /* do not gate, ever */
 /* parents need enable during gate/ungate, set rate and re-parent */
 #define CLK_OPS_PARENT_ENABLE   (1 << 12)
-- 
2.20.1


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