On Tue, Feb 5, 2019 at 11:49 PM Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote:
>
> Layerscape will need accesses in big endian mode. To make this
> possible create static inline wrappers for the io accessors.
>
> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> ---
> drivers/mci/imx-esdhc.c | 149 ++++++++++++++++++++++++----------------
> drivers/mci/imx-esdhc.h | 6 --
> 2 files changed, 91 insertions(+), 64 deletions(-)
>
> diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
> index 9ccc34fbd5..b7d5c01fb5 100644
> --- a/drivers/mci/imx-esdhc.c
> +++ b/drivers/mci/imx-esdhc.c
> @@ -106,6 +106,47 @@ static inline int esdhc_is_usdhc(struct fsl_esdhc_host *data)
> return !!(data->socdata->flags & ESDHC_FLAG_USDHC);
> }
>
> +static inline u32 esdhc_read32(struct fsl_esdhc_host *host, unsigned int reg)
> +{
> + return readl(host->regs + reg);
> +}
> +
> +static inline void esdhc_write32(struct fsl_esdhc_host *host, unsigned int reg,
> + u32 val)
> +{
> + writel(val, host->regs + reg);
> +}
> +
> +static inline void esdhc_clrsetbits32(struct fsl_esdhc_host *host, unsigned int reg,
> + u32 clear, u32 set)
> +{
> + u32 val;
> +
> + val = esdhc_read32(host, reg);
> + val &= ~clear;
> + val |= set;
> + esdhc_write32(host, reg, val);
> +}
> +
> +static inline void esdhc_clrbits32(struct fsl_esdhc_host *host, unsigned int reg,
> + u32 clear)
> +{
> + u32 val;
> +
> + val = esdhc_read32(host, reg);
> + val &= ~clear;
> + esdhc_write32(host, reg, val);
You can simplify this to:
esdhc_clrsetbits32(host, reg, clear, 0);
> +}
> +
> +static inline void esdhc_setbits32(struct fsl_esdhc_host *host, unsigned int reg,
> + u32 set)
> +{
> + u32 val;
> +
> + val = esdhc_read32(host, reg);
> + val |= set;
> + esdhc_write32(host, reg, val);
and this to:
esdhc_clrsetbits32(host, reg, 0, set);
Thanks,
Andrey Smirnov
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