Re: [PATCH 13/21] reset: imx7: Fix always writing bits as 0

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On Tue, Jan 08, 2019 at 11:12:02PM -0800, Andrey Smirnov wrote:
> Port of a Linux commit 26fce0557fa639fb7bbc33e31a57cff7df25c3a0
> 
>   Right now the only user of reset-imx7 is pci-imx6 and the
>   reset_control_assert and deassert calls on pciephy_reset don't toggle
>   the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
>   1 or 0 respectively.
> 
>   The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
>   other registers like MIPIPHY and HSICPHY the bits are explicitly
>   documented as "1 means assert, 0 means deassert".
> 
>   The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
> 
>   Signed-off-by: Leonard Crestez <leonard.crestez@xxxxxxx>
>   Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
>   Signed-off-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
> ---
>  drivers/reset/reset-imx7.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Should also be part of the last patch.

Sascha


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