[PATCH 2/3] ARM: dts: phyCORE-i.MX 6UL/ULL: Enable USB OTG on port 1

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From: Fabian Godehardt <fg@xxxxxxxxx>

Enable USB OTG support on USB OTG port 1 of the phyCORE-i.MX 6UL/ULL.

Signed-off-by: Fabian Godehardt <fg@xxxxxxxxx>
Signed-off-by: Stefan Riedmueller <s.riedmueller@xxxxxxxxx>
---
 arch/arm/dts/imx6ul-phytec-phycore-som.dts  |  4 ++++
 arch/arm/dts/imx6ul-phytec-phycore-som.dtsi | 14 ++++++++++++++
 arch/arm/dts/imx6ull-phytec-phycore-som.dts |  4 ++++
 3 files changed, 22 insertions(+)

diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dts b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
index 509424347082..6d1876702d1b 100644
--- a/arch/arm/dts/imx6ul-phytec-phycore-som.dts
+++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
@@ -40,6 +40,10 @@
 	status = "okay";
 };
 
+&usbotg1 {
+	status = "okay";
+};
+
 &usbotg2 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
index 05bf18d6f1b2..d829fdd6fb29 100644
--- a/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
@@ -89,6 +89,14 @@
 	status = "disabled";
 };
 
+&usbotg1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb_otg1>;
+	dr_mode = "otg";
+	disable-over-current;
+	status = "disabled";
+};
+
 &usbotg2 {
 	dr_mode = "host";
 	disable-over-current;
@@ -169,6 +177,12 @@
 			>;
 		};
 
+		pinctrl_usb_otg1: usbotg1grp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x17059
+			>;
+		};
+
 		pinctrl_usdhc1: usdhc1grp {
 			fsl,pins = <
 				MX6UL_PAD_SD1_CMD__USDHC1_CMD     	0x17059
diff --git a/arch/arm/dts/imx6ull-phytec-phycore-som.dts b/arch/arm/dts/imx6ull-phytec-phycore-som.dts
index de04132a02e7..ce631460caea 100644
--- a/arch/arm/dts/imx6ull-phytec-phycore-som.dts
+++ b/arch/arm/dts/imx6ull-phytec-phycore-som.dts
@@ -39,3 +39,7 @@
 &usdhc1 {
 	status = "okay";
 };
+
+&usbotg1 {
+	status = "okay";
+};
-- 
2.7.4


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