Everyone: This is a number of i.MX8MQ or EVK related changes that are sitting in my repo that I am hoping to upstream: - Pactches 1, 3, 4 are clock related fixes needed to get FEC, USDHC1 and USDHC2 to work. - Patch 2 was made while working custom i.MX8MQ board (not upstreamed yet) that made use of that controller - Patch 5 should be self-explanatory bug fix - Patch 6 is PHY configuration code need to use FEC on EVK - Patch 7 and 8 are both conveninece code to avoid having to specify memory size explicitly as well as a second part of a fix for a problem discussed in [1] Changes since [v1]: - Removed redundant DT code in patch 6 [1] http://lists.infradead.org/pipermail/barebox/2018-August/034402.html [v1] http://lists.infradead.org/pipermail/barebox/2018-September/034742.html Andrey Smirnov (8): clk: i.MX8MQ: Bump refcounters of various important clocks ARM: i.MX8MQ: Add missing node for ECSPI1 ARM: i.MX8MQ: Configure USDHC1,2 clocks ARM: i.MX8MQ: Configure FEC1 clocks ARM: nxp-imx8mq-evk: Add missing compatibility check ARM: nxp-imx8mq-evk: Add FEC's PHY configuration code ARM: i.MX: esdctl: Add memory size detection for i.MX8MQ ARM: nxp-imx8mq-evk: Make use of memory size detection code arch/arm/boards/nxp-imx8mq-evk/board.c | 27 ++++++- arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 4 +- arch/arm/dts/imx8mq-ddrc.dtsi | 17 ++++ arch/arm/dts/imx8mq-evk.dts | 7 +- arch/arm/dts/imx8mq.dtsi | 42 ++++++++++ arch/arm/mach-imx/esdctl.c | 98 +++++++++++++++++++++++ arch/arm/mach-imx/include/mach/esdctl.h | 1 + drivers/clk/imx/clk-imx8mq.c | 12 +++ 8 files changed, 200 insertions(+), 8 deletions(-) create mode 100644 arch/arm/dts/imx8mq-ddrc.dtsi -- 2.17.1 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox