Select appropriate parents as well as clock rates for USDHC1 and
USDHC2 related clocks.
Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
---
arch/arm/dts/imx8mq.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
index 6f860c3d6..8bdf4efb7 100644
--- a/arch/arm/dts/imx8mq.dtsi
+++ b/arch/arm/dts/imx8mq.dtsi
@@ -632,3 +632,23 @@
};
};
};
+
+
+
+&clk {
+ assigned-clocks = <&clk IMX8MQ_CLK_USDHC1_SRC>,
+ <&clk IMX8MQ_CLK_USDHC1_DIV>,
+ <&clk IMX8MQ_CLK_USDHC2_SRC>,
+ <&clk IMX8MQ_CLK_USDHC2_DIV>;
+
+ assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_400M>,
+ <0>,
+ <&clk IMX8MQ_SYS1_PLL_400M>,
+ <0>;
+
+ assigned-clock-rates = <400000000>,
+ <200000000>,
+ <400000000>,
+ <200000000>;
+};
+
--
2.17.1
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