Re: [PATCH] ARM: phytec-phycard-imx27: Add debug UART support

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Am Montag, den 27.08.2018, 14:10 +0200 schrieb Sascha Hauer:
> On Thu, Aug 23, 2018 at 12:20:32PM +0000, Baeuerle, Florian wrote:
> > Some background on that patch:
> > 
> > I've tried to get barebox master compiled with OSELAS 2018 running on a
> > phycard-imx27. I had a few problems with that:
> > 
> > It turned out, that I can boot the resulting image as a seconds stage (from an
> > older version of barebox), after commenting out pca100_usb_init(). I suppose
> > that is not a real problem, but probably related to some clock setup that
> > barebox master does somewhere during early boot (which I suppose, is skipped
> > when booting it as 2nd stage).
> > 
> > However, when flashing the resulting image to NAND, there seems to be a bigger
> > issue somewhere during early boot. This problem does not exist when compiling
> > barebox master with OSELAS 2016.
> 
> I gave it a test and can confirm that the board boots when compiled with
> OSELAS 2016 and no longer boots with OSELAS 2018.

Thanks for confirming this!
> 
> It's strange and I'm out of ideas for now. In
> imx27_barebox_boot_nand_external() we have a place that copies the
> initial image poprtion into SDRAM. It seems the SDRAM is never written
> to - at least according to the information my BDI2000 gives me.

What could you observe with your debugger?
I sadly do not have any hardware debugger available, so I was stuck with writing
characters on the UART which IIRC was completely unsuccessful in
imx27_barebox_boot_nand_external().
> 
> I assume it must be something to do with the SDRAM setup, but the code
> and also the resulting assembly really looks harmless, though a little
> different between both toolchains.
> 
> Sascha
> 
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