Reset reason bits and their meaning seem to be identical between i.MX7
and i.MX8MQ. Share the definitions for the former and used it for the
latter.
Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
---
arch/arm/mach-imx/imx.c | 11 +++++++++++
arch/arm/mach-imx/imx7.c | 11 -----------
arch/arm/mach-imx/imx8mq.c | 6 ++++++
arch/arm/mach-imx/include/mach/reset-reason.h | 1 +
4 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 6fe53f314..ad227663d 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -157,6 +157,17 @@ static int imx_init(void)
}
postcore_initcall(imx_init);
+const struct imx_reset_reason imx7_reset_reasons[] = {
+ { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
+ { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
+ { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_WDOG3_RESET, RESET_WDG, 1 },
+ { IMX_SRC_SRSR_WDOG4_RESET, RESET_WDG, 2 },
+ { IMX_SRC_SRSR_TEMPSENSE_RESET, RESET_THERM, 0 },
+ { /* sentinel */ }
+};
+
const struct imx_reset_reason imx_reset_reasons[] = {
{ IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
{ IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
diff --git a/arch/arm/mach-imx/imx7.c b/arch/arm/mach-imx/imx7.c
index e49baf6f7..ca11e8345 100644
--- a/arch/arm/mach-imx/imx7.c
+++ b/arch/arm/mach-imx/imx7.c
@@ -168,17 +168,6 @@ static struct psci_ops imx7_psci_ops = {
.cpu_off = imx7_cpu_off,
};
-static const struct imx_reset_reason imx7_reset_reasons[] = {
- { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
- { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
- { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
- { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
- { IMX_SRC_SRSR_WDOG3_RESET, RESET_WDG, 1 },
- { IMX_SRC_SRSR_WDOG4_RESET, RESET_WDG, 2 },
- { IMX_SRC_SRSR_TEMPSENSE_RESET, RESET_THERM, 0 },
- { /* sentinel */ }
-};
-
int imx7_init(void)
{
const char *cputypestr;
diff --git a/arch/arm/mach-imx/imx8mq.c b/arch/arm/mach-imx/imx8mq.c
index 95839f31d..1d0bbcfdb 100644
--- a/arch/arm/mach-imx/imx8mq.c
+++ b/arch/arm/mach-imx/imx8mq.c
@@ -19,6 +19,7 @@
#include <mach/generic.h>
#include <mach/revision.h>
#include <mach/imx8mq.h>
+#include <mach/reset-reason.h>
#include <linux/arm-smccc.h>
@@ -47,6 +48,7 @@ core_initcall(imx8mq_init_syscnt_frequency);
int imx8mq_init(void)
{
void __iomem *anatop = IOMEM(MX8MQ_ANATOP_BASE_ADDR);
+ void __iomem *src = IOMEM(MX8MQ_SRC_BASE_ADDR);
uint32_t type = FIELD_GET(DIGPROG_MAJOR,
readl(anatop + MX8MQ_ANATOP_DIGPROG));
struct arm_smccc_res res;
@@ -62,6 +64,10 @@ int imx8mq_init(void)
};
imx_set_silicon_revision(cputypestr, imx8mq_cpu_revision());
+ /*
+ * Reset reasons seem to be identical to that of i.MX7
+ */
+ imx_set_reset_reason(src + IMX7_SRC_SRSR, imx7_reset_reasons);
if (IS_ENABLED(CONFIG_ARM_SMCCC) &&
IS_ENABLED(CONFIG_FIRMWARE_IMX8MQ_ATF)) {
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
index 0f644a8c1..91a817189 100644
--- a/arch/arm/mach-imx/include/mach/reset-reason.h
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -33,5 +33,6 @@ struct imx_reset_reason {
void imx_set_reset_reason(void __iomem *, const struct imx_reset_reason *);
extern const struct imx_reset_reason imx_reset_reasons[];
+extern const struct imx_reset_reason imx7_reset_reasons[];
#endif /* __MACH_RESET_REASON_H__ */
--
2.17.1
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