Hello everybody, I'm working on a board using iMX6. There are variants of the board differing in iMX6S/DL/D/Q and the size of the memory on CS0. The iMX6S/DL/D variants are using 32bit interface to two DDR3 devices (e.g. 1GByte), the iMX6Q variant is using 64bit interface to four DDR3 devices (e.g. 2GByte). This is leading in at least two different .imxcfg files for DRAM-controller initialization. The DRAM Density and the number of mounted DDR3 devices can be read from the board via GPIO-pins. To prevent multiple barebox-images and so multiple pre-programmed SPI-Flashes on stock in the factory, I'm looking for a solution to configure the DRAM-Controller dynamically during barebox boot. Is it possible to have more than one .imxcfg files in one image and if so, how can it be selected to configure the DRAM controller depending on board-info read from GPIO-pins? -- Mit freundlichen Grüßen / Best Regards Elmar Albert Embedded R&D DATA MODUL AG Landsberger Str. 322 80687 Munich Germany Tel: +49 89 56017 197 Fax: +49 89 56017 345 Mail to: ealbert@xxxxxxxxxxxxxx Internet: http://www.data-modul.com Vertrauliche E-Mail von / Confidential e-mail from: DATA MODUL AG Vorstand / CEO: Dr. Florian Pesahl Vorsitzende des Aufsichtsrates / Chairwoman of the Supervisory Board: Kristin D. Russell Sitz der Gesellschaft / Registered Office: München Registergericht / Registration Court: München Handelsregister B 85 591 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox