On Sat, 2018-04-14 at 10:50 -0700, Andrey Smirnov wrote:
> Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
> ---
> arch/arm/mach-imx/imx.c | 49 +++++++++++++++++++++++++++
> arch/arm/mach-imx/include/mach/reset-reason.h | 17 ++++++++++
> 2 files changed, 66 insertions(+)
> create mode 100644 arch/arm/mach-imx/include/mach/reset-reason.h
>
> diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
> index 9400105c6..e860e298a 100644
> --- a/arch/arm/mach-imx/imx.c
> +++ b/arch/arm/mach-imx/imx.c
> @@ -14,8 +14,11 @@
> #include <common.h>
> #include <of.h>
> #include <init.h>
> +#include <io.h>
> #include <mach/revision.h>
> +#include <mach/reset-reason.h>
> #include <mach/generic.h>
> +#include <reset_source.h>
>
> static int __imx_silicon_revision = IMX_CHIP_REV_UNKNOWN;
>
> @@ -147,3 +150,49 @@ static int imx_init(void)
> return ret;
> }
> postcore_initcall(imx_init);
> +
> +void imx_set_reset_reason(void __iomem *srsr)
> +{
> + enum reset_src_type type = RESET_UKWN;
> + const u32 reg = readl(srsr);
> +
> + /*
> + * SRSR register captures ALL reset event that occured since
> + * POR, so we need to clear it to make sure we only caputre
> + * the latest one.
> + */
> + writel(reg, srsr);
What if, say, both a watchdog and the tempsense reset have triggered
since last POR (or since last clearing of SRSR)?
In that case we'll report RESET_UKWN *and* throw away the SRSR
information here.
regards
Philipp
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