[PATCH 20/78] ARM: Move mmu_disable to mmu.c

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mmu_64 has mmu_disable() in mmu_64.c. Move to mmu.c for the 32bit
case aswell to be consistent.

Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
 arch/arm/cpu/cpu.c | 15 ---------------
 arch/arm/cpu/mmu.c | 13 +++++++++++++
 2 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 0e70a23260..c5daf6c60e 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -68,27 +68,12 @@ int icache_status(void)
 	return (get_cr () & CR_I) != 0;
 }
 
-#if __LINUX_ARM_ARCH__ <= 7
 /*
  * SoC like the ux500 have the l2x0 always enable
  * with or without MMU enable
  */
 struct outer_cache_fns outer_cache;
 
-/*
- * Clean and invalide caches, disable MMU
- */
-void mmu_disable(void)
-{
-	__mmu_cache_flush();
-	if (outer_cache.disable) {
-		outer_cache.flush_all();
-		outer_cache.disable();
-	}
-	__mmu_cache_off();
-}
-#endif
-
 static void disable_interrupts(void)
 {
 #if __LINUX_ARM_ARCH__ <= 7
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 2c16579d79..27d994d452 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -511,6 +511,19 @@ static int mmu_init(void)
 }
 mmu_initcall(mmu_init);
 
+/*
+ * Clean and invalide caches, disable MMU
+ */
+void mmu_disable(void)
+{
+	__mmu_cache_flush();
+	if (outer_cache.disable) {
+		outer_cache.flush_all();
+		outer_cache.disable();
+	}
+	__mmu_cache_off();
+}
+
 void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle)
 {
 	void *ret;
-- 
2.16.1


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