Hello Sam, Hello Caglar, Thanks to you both for your quick support! With the configuration of Caglar the state framework is directly detected by barebox. And because my setup seems to pass the DTS from barebox to the linux kernel the dt-utils under linux can directly read/write the state - in my case even without the need to modify the linux dts files. Only thing left now is to configure it all together with bootchooser :-) Thanks again and cheers, Martin -----Ursprüngliche Nachricht----- Von: Çağlar Kilimci [mailto:ckilimci@xxxxxxxxx] Gesendet: Freitag, 21. Juli 2017 08:47 An: Sam Ravnborg <sam@xxxxxxxxxxxx> Cc: Martin Hollingsworth <Martin.Hollingsworth@xxxxxxxxxxxxxxxxxx>; barebox@xxxxxxxxxxxxxxxxxxx Betreff: Re: Barebox state on am335x-phytec-phycore-som Hi all, 2017-07-20 18:06 GMT+03:00 Sam Ravnborg <sam@xxxxxxxxxxxx>: > Hi Martin. > > On Thu, Jul 20, 2017 at 01:09:54PM +0000, Martin Hollingsworth wrote: >> Hi, >> I am trying to enable the barebox state framework and use it to store >> the bootchooser variables on the am335x-phytec-phycore-som board. I >> want to do that, so that the variables can be stored in EEPROM rather >> than in NAND (due to write/erase cycles). I was exactly trying to do the same thing, 3-4 months ago. There is something missing or missleading in the documentation. First of all, you need to compile dts for both barebox and kernel. Each time I would like to make a change, I change both barebox dts and kernel dts. These are two similar but actually two different dts files. As an example, in am335x-phytec-phycore-som.dtsi eeprom device name is "eeprom" but "i2c_eeprom" in kernel's dts. Secondly, backend-storage-type and backend-stridesize have some importance. Even if they are written optional in the documentation, I could not run without them. You need to calculate "backend-stridesize". Lastly, backend should be like this "backend = <&eeprom>;". Here is the barebox patch I use: diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi index 0b8c454..62598cd 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi +++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi @@ -14,6 +14,86 @@ status = "disabled"; }; }; + + state { + magic = <0x4aaef993>; + compatible = "barebox,state"; + backend-type = "raw"; + backend = <&eeprom>; + backend-storage-type = "direct"; + backend-stridesize = <0xf0>; + bootchooser { + system1 { + boot{ + reg = <0x0 0x10>; + type = "string"; + default = "system1"; + }; + default_attempts { + reg = <0x10 0x4>; + type = "uint32"; + default = <0x03>; + }; + default_priority { + reg = <0x14 0x4>; + type = "uint32"; + default = <0x10>; + }; + remaining_attempts { + reg = <0x18 0x4>; + type = "uint32"; + default = <0x03>; + }; + priority { + reg = <0x1c 0x4>; + type = "uint32"; + default = <0x10>; + }; + }; + system2 { + boot{ + reg = <0x20 0x10>; + type = "string"; + default = "system2"; + }; + default_attempts { + reg = <0x30 0x4>; + type = "uint32"; + default = <0x03>; + }; + default_priority { + reg = <0x34 0x4>; + type = "uint32"; + default = <0x0f>; + }; + remaining_attempts { + reg = <0x38 0x4>; + type = "uint32"; + default = <0x03>; + }; + priority { + reg = <0x3c 0x4>; + type = "uint32"; + default = <0x0f>; + }; + }; + last_chosen { + reg = <0x40 0x4>; + type = "uint32"; + default = <0x01>; + }; + boot_to_be { + reg = <0x50 0x10>; + type = "string"; + default = "none"; + }; + update_id { + reg = <0x60 0x10>; + type = "string"; + default = "none"; + }; + }; + }; }; &am33xx_pinmux { Hope, this helps. Sincerely, -- Çağlar Kilimci _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
