The upstream imx50.dtsi is missing the usbphy and usbmisc nodes. Furthermore, the clock property values for the two existing usb instances (usbotg and usbh1) is set to a clock which is not present on the imx50. Note that usbh2 and usbh3 do not exist on the imx50. Fix imx50.dtsi to get the usb peripherial mode via DT running, until imx50.dtsi is fixed upstream. Signed-off-by: Alexander Kurz <akurz@xxxxxxxx> --- arch/arm/dts/imx50.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 arch/arm/dts/imx50.dtsi diff --git a/arch/arm/dts/imx50.dtsi b/arch/arm/dts/imx50.dtsi new file mode 100644 index 0000000..8737d4f --- /dev/null +++ b/arch/arm/dts/imx50.dtsi @@ -0,0 +1,40 @@ +#include <arm/imx50.dtsi> + +/ { + soc { + aips@50000000 { /* AIPS1 */ + usbphy0: usbphy@0 { + compatible = "usb-nop-xceiv"; + clocks = <&clks IMX5_CLK_USB_PHY1_GATE>; + clock-names = "main_clk"; + status = "okay"; + }; + + usbphy1: usbphy@1 { + compatible = "usb-nop-xceiv"; + clocks = <&clks IMX5_CLK_USB_PHY2_GATE>; + clock-names = "main_clk"; + status = "okay"; + }; + + usbmisc: usbmisc@53f80800 { + #index-cells = <1>; + compatible = "fsl,imx53-usbmisc"; + reg = <0x53f80800 0x200>; + clocks = <&clks IMX5_CLK_USBOH3_GATE>; + }; + }; + }; +}; + +&usbotg { + clocks = <&clks IMX5_CLK_USBOH3_GATE>; + fsl,usbmisc = <&usbmisc 0>; + fsl,usbphy = <&usbphy0>; +}; + +&usbh1 { + clocks = <&clks IMX5_CLK_USBOH3_GATE>; + fsl,usbmisc = <&usbmisc 0>; + fsl,usbphy = <&usbphy0>; +}; -- 2.1.4 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox