Trent Piepho <tpiepho@xxxxxxxxxxxxxx> writes: > On Mon, 2017-04-03 at 12:55 +0200, Steffen Trumtrar wrote: >> Although Cyclone5 and Arria10 share a lot of the peripherals, >> they a different in the critical parts (SDRAM controller, clock setup,...) >> >> The Arria10 has a larger OCRAM (64KB vs 256KB), that is why we can >> omit the xload support for now. The xload support can be added, once >> Arria10 boards that need to program the FPGA very early (might be needed for >> the SDRAM controller) are available. >> > > That means this support doesn't include loading the FPGA from barebox? That is correct. > > The boot strategy is that the Barebox PBL image will fit in OCRAM and be > loaded by the ROM loader, and then the PBL will decompress barebox into > SDRAM? If so, it will be necessary to have the FPGA loaded from an > external device, such as an EPCQ flash chip, before barebox boots. As > SDRAM is not accessible until at least the peripheral FPGA image is > loaded. > > U-Boot is able to load a FPGA image with a single bootloader. A U-Boot > image can be made that is small enough run in 256 kB yet has enough > drivers to load an FPGA image from eMMC or NOR flash into the FPGA and > then enable SDRAM. > > It seems like this might be possible for barebox as well. If enough > drivers to load the FPGA were part of the PBL. Of course this is also possible with barebox. The reason that the support is not added yet, is that I do not have any Arria10 board that needs or uses this; even with the provided vendor U-Boot. This series is just groundwork for future development. Regards, Steffen -- Pengutronix e.K. | Steffen Trumtrar | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
