The XUSB binding was changed upstream, to allow for more flexibility
needed to support USB3. The barebox driver has not been adapted to
this change. Add back the old DT properties in the Barebox internal
DT to keep the existing PCIe functionality working.
Signed-off-by: Lucas Stach <dev@xxxxxxxxxx>
---
arch/arm/dts/tegra124.dtsi | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index 8af3a58..ce618db 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
+
/ {
aliases {
mmc0 = "/sdhci@700b0000/";
@@ -5,4 +7,36 @@
mmc2 = "/sdhci@700b0400/";
mmc3 = "/sdhci@700b0600/";
};
+
+ pcie-controller@01003000 {
+ phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
+ phy-names = "pcie";
+ };
+
+ padctl@7009f000 {
+ pinctrl-0 = <&padctl_default>;
+ pinctrl-names = "default";
+ #phy-cells = <1>;
+
+ padctl_default: pinmux {
+ usb3 {
+ nvidia,lanes = "pcie-0", "pcie-1";
+ nvidia,function = "usb3";
+ nvidia,iddq = <0>;
+ };
+
+ pcie {
+ nvidia,lanes = "pcie-2", "pcie-3",
+ "pcie-4";
+ nvidia,function = "pcie";
+ nvidia,iddq = <0>;
+ };
+
+ sata {
+ nvidia,lanes = "sata-0";
+ nvidia,function = "sata";
+ nvidia,iddq = <0>;
+ };
+ };
+ };
};
--
2.9.3
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