On Thu, 26 Jan 2017, Sascha Hauer wrote: > On Wed, Jan 25, 2017 at 12:31:55PM +0100, Alexander Kurz wrote: > > Import the ARM IP bus base addresses from IMX7DRM 05/2016 AIPS Memory Map > > In my reference manual the addresses are given directly as numbers. I > often wondered for the other i.MX SoCs what the advantage of such such > multi-stage defines is: > > #define MX7_AIPS1_ARB_BASE_ADDR 0x30000000 > #define MX7_ATZ1_BASE_ADDR MX7_AIPS1_ARB_BASE_ADDR > #define MX7_AIPS1_OFF_BASE_ADDR (MX7_ATZ1_BASE_ADDR + 0x200000) > #define MX7_GPIO1_BASE_ADDR (MX7_AIPS1_OFF_BASE_ADDR) > > I often enough ended up calculating the values by hand to get the > address to type into barebox md/mw commands or to see which address > is meant to look it up in the reference manual (for some defines which > do not have a clear name) > > Are there any real advantages of these multi stage defines? Otherwise > I would suggest to use the absolute addresses directly. Yes indeed, the lookup of cascaded defines is quite annoying and I am not aware of any benefit. I'll post an updated version of this patch. Cheers, Alexander _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
