[PATCH 1/3] spi: mvebu: fix register macros for Armada 370/XP clock divider

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Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
---
 drivers/spi/mvebu_spi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/mvebu_spi.c b/drivers/spi/mvebu_spi.c
index 887a6a72134c..d61a545f02d8 100644
--- a/drivers/spi/mvebu_spi.c
+++ b/drivers/spi/mvebu_spi.c
@@ -50,8 +50,8 @@
 #define  IF_TRANSFER_2BYTE	BIT(5)
 #define  IF_CLK_PRESCALE_POW2	BIT(4)
 #define  IF_CLK_PRESCALE(x)	((x) & 0x0f)
-#define  IF_CLK_PRE_PRESCALE(x)	(((((x) & 0xc) << 1) | ((x) & 0x1)) << 4)
-#define  IF_CLK_PRESCALE_MASK	(IF_CLK_PRESCALE(7) | IF_CLK_PRE_PRESCALE(7))
+#define  IF_CLK_PRE_PRESCALE(x)	(((((x) & 0x6) << 6) | ((x) & 0x1)) << 4)
+#define  IF_CLK_PRESCALE_MASK	(IF_CLK_PRESCALE(0xf) | IF_CLK_PRE_PRESCALE(7))
 #define SPI_DATA_OUT		0x08
 #define SPI_DATA_IN		0x0c
 #define SPI_INT_CAUSE		0x10
-- 
2.10.2


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