On Mon, Nov 14, 2016 at 10:47:15AM +0100, Maik Otto wrote: > tested with Micron MT42L128M64D2LL-25WT and MT42L128M64D2LL-25WT > > Signed-off-by: Maik Otto <m.otto@xxxxxxxxx> > --- > arch/arm/boards/phytec-phycore-omap4460/lowlevel.c | 32 +++++++++++++++++++- > 1 files changed, 31 insertions(+), 1 deletions(-) Applied, thanks Sascha > > diff --git a/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c b/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c > index c082594..71ab793 100644 > --- a/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c > +++ b/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c > @@ -30,6 +30,13 @@ > #include <asm/barebox-arm-head.h> > > #define TPS62361_VSEL0_GPIO 182 > +#define LPDDR2_2G 0x5 > +#define LPDDR2_4G 0x6 > +#define LPDDR2_DENSITY_MASK 0x3C > +#define LPDDR2_DENSITY_SHIFT 2 > +#define EMIF_SDRAM_CONFIG 0x0008 > +#define EMIF_LPDDR2_MODE_REG_CONFIG 0x0050 > +#define EMIF_LPDDR2_MODE_REG_DATA 0x0040 > > void set_muxconf_regs(void); > > @@ -61,8 +68,23 @@ static const struct ddr_regs ddr_regs_mt42L128M64_25_400_mhz = { > .mr2 = 0x4 > }; > > +static const struct ddr_regs ddr_regs_mt42L128M64D2LL_25_400_mhz = { > + .tim1 = 0x10EB0662, > + .tim2 = 0x205715D2, > + .tim3 = 0x00B1C53F, > + .phy_ctrl_1 = 0x849FF409, > + .ref_ctrl = 0x00000618, > + .config_init = 0x80001AB2, > + .config_final = 0x80001AB2, > + .zq_config = 0x500B3214, > + .mr1 = 0x83, > + .mr2 = 0x4 > +}; > + > static void noinline pcm049_init_lowlevel(void) > { > + unsigned int density; > + > struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400; > struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000; > struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920; > @@ -75,9 +97,17 @@ static void noinline pcm049_init_lowlevel(void) > set_muxconf_regs(); > > #ifdef CONFIG_1024MB_DDR2RAM > + omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core); > + writel(EMIF_SDRAM_CONFIG, OMAP44XX_EMIF1_BASE + > + EMIF_LPDDR2_MODE_REG_CONFIG); > + density = (readl(OMAP44XX_EMIF1_BASE + EMIF_LPDDR2_MODE_REG_DATA) & > + LPDDR2_DENSITY_MASK) >> LPDDR2_DENSITY_SHIFT; > + if (density == LPDDR2_2G) > omap4_ddr_init(&ddr_regs_mt42L128M64_25_400_mhz, &core); > + else if (density == LPDDR2_4G) > + omap4_ddr_init(&ddr_regs_mt42L128M64D2LL_25_400_mhz, &core); > #else > - omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core); > + omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core); > #endif > > /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ > -- > 1.7.0.4 > > > _______________________________________________ > barebox mailing list > barebox@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox