Hi Sascha, Thanks for the quick reply. > So you replaced barebox_arm_entry with imx53_barebox_entry, right? What > memory size do you have and what size gets detected then? Yes, I used imx53_barebox_entry. I have two boards, 512MB/1G. In further testing, I found the 512MB board was detected correctly, and the 1G board was detected at 2G. ... > As a first step you should remove the /memory node in > arch/arm/dts/imx53-ccxmx53.dtsi. Since there are different possible > memory setups for this board it is wrong anyway. Then it would be > interesting what imx_esdctl_v4_add_mem() detects. I believe it should be > possible to fix it if it detects the wrong memory size. For the 1G board, I removed the memory node and looked into imx_esdctl_v4_add_mem(). I found: add_mem: cs0 base: 0x70000000 cs0 size: 0x40000000 add_mem: cs1 base: 0xb0000000 cs1 size: 0x40000000 Going further into it, I found in the imx_v4_sdram_size() read the following from the esdctl registers: ctlval:0xc4110000, esdmisc:0xc00016d0 which is set from the appropriate flash-header file. The ram populated on the 1G board is MT47H128M16 – 128 Meg x 16 (16 Meg x 16 x 8 banks). Comparing the register setting against the datasheet for the ram chips looks like there was a mistake in the row setting of the 1G flash-header. After updating it to what I believe is correct setting: (ctlval:0xc3110000, esdmisc:0xc00016d0), the memory is now detected correctly. Unless you see any Issue with my findings, I'll go with this fix. Thanks, Jason _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
