Marvell NAND controller allows to enable an Auto Read Status feature that will automatically monitor NAND status during Erase and Program operations. Ready bit in status register will be set after the controller is sure the NAND device has finished the operation and saves us from guessing the real timeout values. Using the Auto Read Status feature prevents timeout issues on the two operations with none or wrong timing register setup. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@xxxxxxxxx> Tested-by: Robert Jarzmik <robert.jarzmik@xxxxxxx> --- drivers/mtd/nand/nand_mrvl_nfc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c index 60c34c21af25..ac530fc62499 100644 --- a/drivers/mtd/nand/nand_mrvl_nfc.c +++ b/drivers/mtd/nand/nand_mrvl_nfc.c @@ -562,6 +562,7 @@ static int prepare_set_command(struct mrvl_nand_host *host, int command, case NAND_CMD_PAGEPROG: host->ndcb0 |= NDCB0_CMD_TYPE(0x1) + | NDCB0_AUTO_RS | NDCB0_DBC | (NAND_CMD_PAGEPROG << 8) | NAND_CMD_SEQIN @@ -599,6 +600,7 @@ static int prepare_set_command(struct mrvl_nand_host *host, int command, case NAND_CMD_ERASE1: host->ndcb0 |= NDCB0_CMD_TYPE(2) + | NDCB0_AUTO_RS | NDCB0_ADDR_CYC(3) | NDCB0_DBC | (NAND_CMD_ERASE2 << 8) -- 2.1.4 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
