From: Oleksij Rempel <linux@xxxxxxxxxxxxxxxx> Barebox' PBL can initialize memory controller of the board. But we can use memory controller initialization routine only if PBL runs from ROM or on-chip SRAM. MIPS architecture standard boot vector is 0xbfc00000 so on most MIPS SoCs all addresses higher than 0xbfc00000 belong to boot ROM or on-chip SRAM. Well then we have simple criterion to check if PBL run from ROM: just check if current PC is higher than 0xbfc00000. Some MIPS boards have ROM start address lower than 0xbfc00000 so it's reasonable we have to make ROM start address board dependend. The pbl_blt macro checks if current pc is lower than the first argument (ROM start address). If so then next instruction executed is defined by the second argument of the macro. Signed-off-by: Oleksij Rempel <linux@xxxxxxxxxxxxxxxx> Signed-off-by: Antony Pavlov <antonynpavlov@xxxxxxxxx> --- arch/mips/include/asm/pbl_macros.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h index c4ae6a2..dbe3410 100644 --- a/arch/mips/include/asm/pbl_macros.h +++ b/arch/mips/include/asm/pbl_macros.h @@ -60,6 +60,18 @@ .set pop .endm + .macro pbl_blt addr label tmp + .set push + .set noreorder + move \tmp, ra # preserve ra beforehand + bal 253f + nop +253: + bltu ra, \addr, \label + move ra, \tmp # restore ra + .set pop + .endm + .macro pbl_sleep reg count .set push .set noreorder -- 2.6.2 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
