Old Ingenic SoCs (JZ4755, JZ4740) use MIPS32r1 ISA CPU cores than latest ones (JZ4770, JZ4780) use MIPS32r2. Signed-off-by: Antony Pavlov <antonynpavlov@xxxxxxxxx> --- arch/mips/Kconfig | 1 - arch/mips/mach-xburst/Kconfig | 7 +++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index bc68c67..40d5d83 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -82,7 +82,6 @@ config MACH_MIPS_LOONGSON config MACH_MIPS_XBURST bool "Ingenic XBurst-based boards" - select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_32BIT_KERNEL select DRIVER_SERIAL_NS16550 diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig index f7b8470..4d57015 100644 --- a/arch/mips/mach-xburst/Kconfig +++ b/arch/mips/mach-xburst/Kconfig @@ -6,6 +6,13 @@ config ARCH_TEXT_BASE config CPU_JZ4755 bool + select SYS_HAS_CPU_MIPS32_R1 + select WATCHDOG + select WATCHDOG_JZ4740 + +config CPU_JZ4780 + bool + select SYS_HAS_CPU_MIPS32_R2 select WATCHDOG select WATCHDOG_JZ4740 -- 2.1.0 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
