Am Mittwoch, den 30.07.2014, 10:39 +0200 schrieb Sebastian Hesselbarth: > Third and hopefully last round of the Marvell EBU PCIe driver patch > set. Compared to v2, I disabled MBUS error propagation on Armada > 370/XP as it hangs the SoC on unanswered PCIe accesses. Also, 64b > BARs are now properly handled. I added two more pci core fixes that > move PCI device registration after BAR setup and temporarely disable > PCI_COMMAND' IO and MEM bits during BAR setup. > > The MVEBU PCIe driver now gained support for Armada XP PHY setup > which is anticipating a minor DT binding tweak to allow more than > one marvell,pcie-lane passed to the node. Also, PCI address space > does now also start at where we see it on MBUS. Some devices were > not so happy about starting at 0. > > The whole series has been tested on Armada 370 Mirabox and > Armada XP Lenovo Iomega ix4-300d (not mainline yet). > > Sebastian > This looks good to me. Patches 3-7 are Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx Series is Acked-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx> -- Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
