On the i.MX53 this has the effect that in early init only half of the memory bank is detected and the barebox image is place in the middle of SDRAM. Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- arch/arm/mach-imx/esdctl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index bb8fec2..811592f 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -549,9 +549,9 @@ void __naked __noreturn imx53_barebox_entry(void *boarddata) unsigned long base, size; upper_or_coalesced_range(MX53_CSD0_BASE_ADDR, - imx_v3_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0), + imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0), MX53_CSD1_BASE_ADDR, - imx_v3_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1), + imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1), &base, &size); barebox_arm_entry(base, size, boarddata); -- 2.0.1 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
