Clock gates having the CLK_GATE_HIWORD_MASK flag set use the upper 16
bits of the register as a "write enable" mask for the value in the
lower 16 bits.
Signed-off-by: Beniamino Galvani <b.galvani@xxxxxxxxx>
---
drivers/clk/clk-gate.c | 17 ++++++++++++-----
include/linux/clk.h | 1 +
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 54489c4..85eba3d 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -37,12 +37,19 @@ static void clk_gate_endisable(struct clk *clk, int enable)
u32 val;
set ^= enable;
- val = readl(gate->reg);
- if (set)
- val |= BIT(gate->shift);
- else
- val &= ~BIT(gate->shift);
+ if (gate->flags & CLK_GATE_HIWORD_MASK) {
+ val = BIT(gate->shift + 16);
+ if (set)
+ val |= BIT(gate->shift);
+ } else {
+ val = readl(gate->reg);
+
+ if (set)
+ val |= BIT(gate->shift);
+ else
+ val &= ~BIT(gate->shift);
+ }
writel(val, gate->reg);
}
diff --git a/include/linux/clk.h b/include/linux/clk.h
index fbfdd4f..49cb5a2 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -200,6 +200,7 @@ static inline int clk_set_rate(struct clk *clk, unsigned long rate)
#define CLK_SET_RATE_PARENT (1 << 0) /* propagate rate change up one level */
#define CLK_GATE_INVERTED (1 << 0)
+#define CLK_GATE_HIWORD_MASK (1 << 1)
struct clk_ops {
int (*enable)(struct clk *clk);
--
1.7.10.4
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