omap3 has a soc specific reset function, make sure it calls common_reset so that the proper CPU flags are set. Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- arch/arm/mach-omap/omap3_core.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap/omap3_core.S b/arch/arm/mach-omap/omap3_core.S index ea55efd..38a8cb4 100644 --- a/arch/arm/mach-omap/omap3_core.S +++ b/arch/arm/mach-omap/omap3_core.S @@ -83,6 +83,7 @@ finished_inval: mcr p15, 2, r10, c0, c0, 0 /* select current cache level in cssr */ isb #endif /* CONFIG_CPU_V7_DCACHE_SKIP */ + common_reset r0 /* back to arch calling code */ b board_init_lowlevel_return ENDPROC(reset) -- 1.7.10.4 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
