Signed-off-by: Vicente <vicencb@xxxxxxxxx>
---
arch/arm/cpu/cpu.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 51da3b5..2bfd3ed 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -31,6 +31,7 @@
#include <asm/system_info.h>
#include <asm/cputype.h>
#include <asm/cache.h>
+#include <asm/ptrace.h>
/**
* Enable processor's instruction cache
@@ -78,6 +79,16 @@ void arch_shutdown(void)
mmu_disable();
#endif
flush_icache();
+ /*
+ * barebox normally does not use interrupts, but some functionalities
+ * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+ * disabled before exiting.
+ */
+#if __LINUX_ARM_ARCH__ >= 6
+ __asm__ __volatile__("cpsid i");
+#else
+ __asm__ __volatile__("msr cpsr_c, %0" : : "I"(PSR_I_BIT | SVC_MODE));
+#endif
}
#ifdef CONFIG_THUMB2_BAREBOX
--
1.7.12.2
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