Currently the watchdog is occupied for system reset. This usage collides with the dedicated usage of a watchdog. This patch change the behaviour of at least i.MX23/i.MX28 where the chipset supports a simple and powerful alternative to reset the whole SoC (including the PMIC). Signed-off-by: Juergen Beisert <jbe@xxxxxxxxxxxxxx> --- arch/arm/mach-mxs/soc-imx23.c | 37 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-mxs/soc-imx28.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 arch/arm/mach-mxs/soc-imx23.c create mode 100644 arch/arm/mach-mxs/soc-imx28.c diff --git a/arch/arm/mach-mxs/soc-imx23.c b/arch/arm/mach-mxs/soc-imx23.c new file mode 100644 index 0000000..964b722 --- /dev/null +++ b/arch/arm/mach-mxs/soc-imx23.c @@ -0,0 +1,37 @@ +/* + * (c) 2012 Juergen Beisert <kernel@xxxxxxxxxxxxxx> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Collection of some SoC specific functions + */ + +#include <common.h> +#include <init.h> +#include <mach/imx-regs.h> +#include <io.h> + +#define HW_CLKCTRL_RESET 0x120 +# define HW_CLKCTRL_RESET_CHIP (1 << 1) + +/* Reset the full i.MX23 SoC via a chipset feature */ +void __noreturn reset_cpu (unsigned long addr) +{ + u32 reg; + + reg = readl(IMX_CCM_BASE + HW_CLKCTRL_RESET); + writel(reg | HW_CLKCTRL_RESET_CHIP, IMX_CCM_BASE + HW_CLKCTRL_RESET); + + while (1) + ; + /*NOTREACHED*/ +} +EXPORT_SYMBOL(reset_cpu); diff --git a/arch/arm/mach-mxs/soc-imx28.c b/arch/arm/mach-mxs/soc-imx28.c new file mode 100644 index 0000000..c7a34a8 --- /dev/null +++ b/arch/arm/mach-mxs/soc-imx28.c @@ -0,0 +1,37 @@ +/* + * (c) 2012 Juergen Beisert <kernel@xxxxxxxxxxxxxx> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Collection of some SoC specific functions + */ + +#include <common.h> +#include <init.h> +#include <mach/imx-regs.h> +#include <io.h> + +#define HW_CLKCTRL_RESET 0x1e0 +# define HW_CLKCTRL_RESET_CHIP (1 << 1) + +/* Reset the full i.MX28 SoC via a chipset feature */ +void __noreturn reset_cpu (unsigned long addr) +{ + u32 reg; + + reg = readl(IMX_CCM_BASE + HW_CLKCTRL_RESET); + writel(reg | HW_CLKCTRL_RESET_CHIP, IMX_CCM_BASE + HW_CLKCTRL_RESET); + + while (1) + ; + /*NOTREACHED*/ +} +EXPORT_SYMBOL(reset_cpu); -- 1.7.10 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox