Re[2]: [PATCH 6/7] i.MX51: Add PAD_CTL_HYS bit to SD_CLK pads

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Hello.

> Alexander Shiyan <shc_work@xxxxxxx> a écrit :
> > -#define MX51_PAD_SD1_CLK__SD1_CLK			IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL)
> > +#define MX51_PAD_SD1_CLK__SD1_CLK			IOMUX_PAD(0x7A0, 0x398, 0x10, 0x0, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
> why is this change needed ?

Of course, the hysteresis is used to input pins, but I noticed that the shape of the output signal CLK is improved by setting
this bit. Especially noticeable at high speed. Perhaps this is especially the layout.
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