On Mon, Aug 01, 2011 at 03:26:43PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: > Hi, > > This series reworks the barebox MMU support. We now use second > level page tables which allows us to remap the dma coherent area > dynamically. We don't have to map our sdram twice anymore which > helps us on newer systems with big memory. > > As a bonus there is no board specific MMU code anymore. All a board > has to do to enable MMU support via Kconfig is to register its SDRAM banks > at mem_initcall > > The following changes since commit b821d73607cc6387b1ee588af97a44e8eb2b4fe2: > > Merge branch 'resource' of git://uboot.jcrosoft.org/barebox into next (2011-08-01 14:10:38 +0200) > > are available in the git repository at: > > git://uboot.jcrosoft.org/barebox.git mmu > > Jean-Christophe PLAGNIOL-VILLARD (2): > arm: introduce arm_add_mem_device to register dram device > init: introduce mem, mmu and postmmu initcall > > Sascha Hauer (7): > ARM cache l2x0: depend on MMU > ARM: move armlinux_add_dram to location which is always compiled > ARM l2x0: make init function static inline if l2 is not available > ARM: pass size to dma_free_coherent > ARM boards: move sdram setup before mmu setup > ARM: rework MMU support > ARM boards: remove now unnecessary mmu calls merged up to 7/9. The MMU rework needs some changes to v1 which I haven't posted yet. It does not work correctly on armv7 as these processors need slightly different second level page table entries. Also, I added the appropriate KEEP directives to include/asm-generic/barebox.lds.h to make this branch work. Would be good if you could give your patches at least *some* testing. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
