Update RAM timings with extended row cycle delay. Signed-off-by: Teresa Gámez <t.gamez@xxxxxxxxx> --- arch/arm/boards/pcm043/lowlevel.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/boards/pcm043/lowlevel.c b/arch/arm/boards/pcm043/lowlevel.c index eff96f9..bbe586b 100644 --- a/arch/arm/boards/pcm043/lowlevel.c +++ b/arch/arm/boards/pcm043/lowlevel.c @@ -146,7 +146,7 @@ void __bare_init __naked board_init_lowlevel(void) writel(0x00000304, ESDMISC); /* was 0x00000004 */ /* set timing paramters */ - writel(0x00255417, ESDCFG0); + writel(0x0025541F, ESDCFG0); /* select Precharge-All mode */ writel(0x92220000, ESDCTL0); /* Precharge-All */ -- 1.7.0.4 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
