The armv7 specific __mmu_cache_on function accidently sets the page table pointer with the unitialized value of r3. It seems that often enough r3 still held the correct value from a previous call to mmu_init allowing this bug to remain uncovered for longer. Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- arch/arm/cpu/cache-armv7.S | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S index 79bc243..538ab28 100644 --- a/arch/arm/cpu/cache-armv7.S +++ b/arch/arm/cpu/cache-armv7.S @@ -20,7 +20,6 @@ ENTRY(__mmu_cache_on) #endif orrne r0, r0, #1 @ MMU enabled movne r1, #-1 - mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif mcr p15, 0, r0, c1, c0, 0 @ load control register -- 1.7.2.3 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
