On 15:53 Wed 10 Nov , Sascha Hauer wrote: > Hi all, > > The following series is a respin of the series adding i.MX51 Nand support > to the kernel for barebox. > > The series reveals to problems in barebox. First the i.MX51 Nand controller > needs two memory resources. Since I know that Jean-Christophe recently > worked on adding resources to barebox I decided for a hack in the driver > for now: I just hardcoded the second base address. Second the current > implementation of dma_alloc_coherent stinks. The implementation simply > maps the whole SDRAM a second time uncached. This way we can use the > normal malloc function to allocate dma coherent memory and just add > a known offset to the returned pointer. On i.MX51 boards with 512MB SDRAM > we do not have enough space in the memory map to map the SDRAM twice, in > my case the mapping shadowed the Nand register space. Be aware of this > when you try to add Nand support to your i.MX51 board and use the babbage > code as a template. I'll try to push the code today for the ressource because as for the i.MX51 I need multiple ressource for sh4 for USB as example Best Regards, J. _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
