- support NAND external boot
- enable only used clocks
- LCD fix in /env/bin/init
- I2C support
- SDCard support
- USB Host 1 support
- DFU support on OTG port
- update defconfig
Signed-off-by: Eric BÃnard <eric@xxxxxxxxxx>
---
arch/arm/boards/eukrea_cpuimx25/env/bin/init | 2 +
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c | 104 +++++++++++++++++++-
arch/arm/boards/eukrea_cpuimx25/lowlevel.c | 64 ++++++++++---
arch/arm/configs/eukrea_cpuimx25_defconfig | 12 ++-
4 files changed, 162 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boards/eukrea_cpuimx25/env/bin/init b/arch/arm/boards/eukrea_cpuimx25/env/bin/init
index 335d7ae..4732875 100644
--- a/arch/arm/boards/eukrea_cpuimx25/env/bin/init
+++ b/arch/arm/boards/eukrea_cpuimx25/env/bin/init
@@ -14,9 +14,11 @@ fi
if [ -f /env/logo.bmp ]; then
bmp /env/logo.bmp
+ fb0.enable=1
elif [ -f /env/logo.bmp.lzo ]; then
unlzo /env/logo.bmp.lzo /logo.bmp
bmp /logo.bmp
+ fb0.enable=1
fi
if [ -z $eth0.ethaddr ]; then
diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
index 7fd1031..c2eb398 100644
--- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
+++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
@@ -40,6 +40,8 @@
#include <nand.h>
#include <mach/imx-flash-header.h>
#include <mach/iomux-mx25.h>
+#include <i2c/i2c.h>
+#include <usb/fsl_usb2.h>
extern unsigned long _stext;
extern void exception_vectors(void);
@@ -151,6 +153,70 @@ static struct device_d imxfb_dev = {
.platform_data = &eukrea_cpuimx25_fb_data,
};
+static struct device_d i2c_dev = {
+ .id = -1,
+ .name = "i2c-imx",
+ .map_base = IMX_I2C1_BASE,
+};
+
+static struct device_d esdhc_dev = {
+ .name = "imx-esdhc",
+ .map_base = 0x53fb4000,
+};
+
+#ifdef CONFIG_USB
+
+#define MX35_H1_SIC_SHIFT 21
+#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
+#define MX35_H1_PM_BIT (1 << 8)
+#define MX35_H1_IPPUE_UP_BIT (1 << 7)
+#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
+#define MX35_H1_TLL_BIT (1 << 5)
+#define MX35_H1_USBTE_BIT (1 << 4)
+#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
+
+static void imx25_usb_init(void)
+{
+ unsigned int tmp;
+
+ /* Host 1 */
+ tmp = readl(IMX_OTG_BASE + 0x600);
+ tmp &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT |
+ MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
+ tmp |= (MXC_EHCI_INTERFACE_SINGLE_UNI) << MX35_H1_SIC_SHIFT;
+ tmp |= MX35_H1_USBTE_BIT;
+ tmp |= MX35_H1_IPPUE_DOWN_BIT;
+ writel(tmp, IMX_OTG_BASE + 0x600);
+
+ tmp = readl(IMX_OTG_BASE + 0x584);
+ tmp |= 3 << 30;
+ writel(tmp, IMX_OTG_BASE + 0x584);
+
+ /* Set to Host mode */
+ tmp = readl(IMX_OTG_BASE + 0x5a8);
+ writel(tmp | 0x3, IMX_OTG_BASE + 0x5a8);
+}
+
+static struct device_d usbh2_dev = {
+ .id = -1,
+ .name = "ehci",
+ .map_base = IMX_OTG_BASE + 0x400,
+ .size = 0x200,
+};
+#endif
+
+static struct fsl_usb2_platform_data usb_pdata = {
+ .operating_mode = FSL_USB2_DR_DEVICE,
+ .phy_mode = FSL_USB2_PHY_UTMI,
+};
+
+static struct device_d usbotg_dev = {
+ .name = "fsl-udc",
+ .map_base = IMX_OTG_BASE,
+ .size = 0x200,
+ .platform_data = &usb_pdata,
+};
+
#ifdef CONFIG_MMU
static void eukrea_cpuimx25_mmu_init(void)
{
@@ -209,6 +275,16 @@ static struct pad_desc eukrea_cpuimx25_pads[] = {
MX25_PAD_HSYNC__LCDC_HSYN,
/* BACKLIGHT CONTROL */
MX25_PAD_PWM__GPIO26,
+ /* I2C */
+ MX25_PAD_I2C1_CLK__SCL,
+ MX25_PAD_I2C1_DAT__SDA,
+ /* SDCard */
+ MX25_PAD_SD1_CLK__CLK,
+ MX25_PAD_SD1_CMD__CMD,
+ MX25_PAD_SD1_DATA0__DAT0,
+ MX25_PAD_SD1_DATA1__DAT1,
+ MX25_PAD_SD1_DATA2__DAT2,
+ MX25_PAD_SD1_DATA3__DAT3,
};
static int eukrea_cpuimx25_devices_init(void)
@@ -217,6 +293,7 @@ static int eukrea_cpuimx25_devices_init(void)
mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
ARRAY_SIZE(eukrea_cpuimx25_pads));
+
register_device(&fec_dev);
nand_info.width = 1;
@@ -238,6 +315,15 @@ static int eukrea_cpuimx25_devices_init(void)
register_device(&imxfb_dev);
+ register_device(&i2c_dev);
+ register_device(&esdhc_dev);
+
+#ifdef CONFIG_USB
+ imx25_usb_init();
+ register_device(&usbh2_dev);
+#endif
+ register_device(&usbotg_dev);
+
armlinux_add_dram(&sdram0_dev);
armlinux_set_bootparams((void *)0x80000100);
armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX25);
@@ -256,7 +342,6 @@ static struct device_d eukrea_cpuimx25_serial_device = {
static int eukrea_cpuimx25_console_init(void)
{
- writel(0x03010101, IMX_CCM_BASE + CCM_PCDR3);
register_device(&eukrea_cpuimx25_serial_device);
return 0;
}
@@ -270,10 +355,17 @@ void __bare_init nand_boot(void)
}
#endif
-static int eukrea_cpuimx25_core_setup(void)
-{
- writel(0x01010103, IMX_CCM_BASE + CCM_PCDR2);
- return 0;
+static int eukrea_cpuimx25_core_init(void) {
+ /* enable UART1, FEC, SDHC, USB & I2C clock */
+ writel(readl(IMX_CCM_BASE + CCM_CGCR0) | (1 << 6) | (1 << 23)
+ | (1 << 15) | (1 << 21) | (1 << 3) | (1 << 28),
+ IMX_CCM_BASE + CCM_CGCR0);
+ writel(readl(IMX_CCM_BASE + CCM_CGCR1) | (1 << 23) | (1 << 15)
+ | (1 << 13), IMX_CCM_BASE + CCM_CGCR1);
+ writel(readl(IMX_CCM_BASE + CCM_CGCR2) | (1 << 14),
+ IMX_CCM_BASE + CCM_CGCR2);
+ return 0;
}
-core_initcall(eukrea_cpuimx25_core_setup);
+
+core_initcall(eukrea_cpuimx25_core_init);
diff --git a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
index b9d3ce5..4ebf247 100644
--- a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
@@ -26,13 +26,13 @@
#include <mach/imx-regs.h>
#include <mach/imx-pll.h>
#include <mach/esdctl.h>
-#include <asm/cache-l2x0.h>
#include <asm/io.h>
#include <mach/imx-nand.h>
#include <asm/barebox-arm.h>
#include <asm-generic/memory_layout.h>
#include <asm/system.h>
+#ifdef CONFIG_NAND_IMX_BOOT
static void __bare_init __naked insdram(void)
{
uint32_t r;
@@ -45,17 +45,32 @@ static void __bare_init __naked insdram(void)
board_init_lowlevel_return();
}
-
-#define MX25_CCM_MCR 0x64
-#define MX25_CCM_CGR0 0x0c
-#define MX25_CCM_CGR1 0x10
-#define MX25_CCM_CGR2 0x14
+#endif
void __bare_init __naked board_init_lowlevel(void)
{
uint32_t r;
+#ifdef CONFIG_NAND_IMX_BOOT
unsigned int *trg, *src;
int i;
+#endif
+ register uint32_t loops = 0x20000;
+
+ /* restart the MPLL and wait until it's stable */
+ writel(readl(IMX_CCM_BASE + CCM_CCTL) | (1 << 27),
+ IMX_CCM_BASE + CCM_CCTL);
+ while (readl(IMX_CCM_BASE + CCM_CCTL) & (1 << 27)) {};
+
+ /* Configure dividers and ARM clock source
+ * ARM @ 400 MHz
+ * AHB @ 133 MHz
+ */
+ writel(0x20034000, IMX_CCM_BASE + CCM_CCTL);
+
+ /* Enable UART1 / FEC / */
+/* writel(0x1FFFFFFF, IMX_CCM_BASE + CCM_CGCR0);
+ writel(0xFFFFFFFF, IMX_CCM_BASE + CCM_CGCR1);
+ writel(0x000FDFFF, IMX_CCM_BASE + CCM_CGCR2);*/
/* AIPS setup - Only setup MPROTx registers. The PACR default values are good.
* Set all MPROTx to be non-bufferable, trusted for R/W,
@@ -102,23 +117,46 @@ void __bare_init __naked board_init_lowlevel(void)
*/
writel(0x1, 0xb8003000);
- /* enable all the clocks */
- writel(0x038A81A2, IMX_CCM_BASE + MX25_CCM_CGR0);
- writel(0x24788F00, IMX_CCM_BASE + MX25_CCM_CGR1);
- writel(0x00004438, IMX_CCM_BASE + MX25_CCM_CGR2);
- writel(0x00, IMX_CCM_BASE + MX25_CCM_MCR);
+ /* Speed up NAND controller by adjusting the NFC divider */
+ r = readl(IMX_CCM_BASE + CCM_PCDR2);
+ r &= ~0xf;
+ r |= 0x1;
+ writel(r, IMX_CCM_BASE + CCM_PCDR2);
+
+ /* Skip SDRAM initialization if we run from RAM */
+ r = get_pc();
+ if (r > 0x80000000 && r < 0x90000000)
+ board_init_lowlevel_return();
+
+ /* Init Mobile DDR */
+ writel(0x0000000E, ESDMISC);
+ writel(0x00000004, ESDMISC);
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0" (loops));
+
+ writel(0x0029572B, ESDCFG0);
+ writel(0x92210000, ESDCTL0);
+ writeb(0xda, IMX_SDRAM_CS0 + 0x400);
+ writel(0xA2210000, ESDCTL0);
+ writeb(0xda, IMX_SDRAM_CS0);
+ writeb(0xda, IMX_SDRAM_CS0);
+ writel(0xB2210000, ESDCTL0);
+ writeb(0xda, IMX_SDRAM_CS0 + 0x33);
+ writeb(0xda, IMX_SDRAM_CS0 + 0x1000000);
+ writel(0x82216080, ESDCTL0);
#ifdef CONFIG_NAND_IMX_BOOT
/* skip NAND boot if not running from NFC space */
r = get_pc();
- if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x1000)
+ if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x800)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
/* Move ourselves out of NFC SRAM */
- for (i = 0; i < 0x1000 / sizeof(int); i++)
+ for (i = 0; i < 0x800 / sizeof(int); i++)
*trg++ = *src++;
/* Jump to SDRAM */
diff --git a/arch/arm/configs/eukrea_cpuimx25_defconfig b/arch/arm/configs/eukrea_cpuimx25_defconfig
index feb758e..bc68804 100644
--- a/arch/arm/configs/eukrea_cpuimx25_defconfig
+++ b/arch/arm/configs/eukrea_cpuimx25_defconfig
@@ -9,6 +9,7 @@ CONFIG_LONGHELP=y
CONFIG_GLOB=y
CONFIG_PROMPT_HUSH_PS2="cpuimx25>"
CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_HUSH_GETOPT=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
CONFIG_PARTITION=y
@@ -23,6 +24,7 @@ CONFIG_CMD_READLINE=y
CONFIG_CMD_ECHO_E=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
CONFIG_CMD_MTEST=y
CONFIG_CMD_FLASH=y
CONFIG_CMD_BOOTM_ZLIB=y
@@ -35,15 +37,23 @@ CONFIG_CMD_PARTITION=y
CONFIG_CMD_BMP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_UNLZO=y
+CONFIG_CMD_I2C=y
CONFIG_NET=y
CONFIG_NET_DHCP=y
CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
CONFIG_DRIVER_NET_FEC_IMX=y
# CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_IMX=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_IMX=y
-CONFIG_NAND_IMX_BOOT=y
+CONFIG_USB=y
+CONFIG_USB_EHCI=y
+CONFIG_USB_GADGET=y
CONFIG_VIDEO=y
CONFIG_DRIVER_VIDEO_IMX=y
+CONFIG_MCI=y
+CONFIG_MCI_IMX_ESDHC=y
+CONFIG_MCI_IMX_ESDHC_PIO=y
--
1.7.0.4
_______________________________________________
barebox mailing list
barebox@xxxxxxxxxxxxxxxxxxx
http://lists.infradead.org/mailman/listinfo/barebox
