- support NAND internal boot
- update external boot init sequence
- LCD enable
Signed-off-by: Eric BÃnard <eric@xxxxxxxxxx>
---
arch/arm/boards/eukrea_cpuimx35/env/bin/init | 4 +-
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c | 2 +-
arch/arm/boards/eukrea_cpuimx35/flash_header.c | 23 ++++++++++-----------
arch/arm/boards/eukrea_cpuimx35/lowlevel.c | 20 +++++++++++-------
4 files changed, 26 insertions(+), 23 deletions(-)
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/init b/arch/arm/boards/eukrea_cpuimx35/env/bin/init
index 90007cd..b56d7b5 100644
--- a/arch/arm/boards/eukrea_cpuimx35/env/bin/init
+++ b/arch/arm/boards/eukrea_cpuimx35/env/bin/init
@@ -15,12 +15,12 @@ fi
if [ -f /env/logo.bmp ]; then
fb0.enable=1
bmp /env/logo.bmp
- gpio_direction_out 1 1
+ gpio_set_value 1 1
elif [ -f /env/logo.bmp.lzo ]; then
unlzo /env/logo.bmp.lzo /logo.bmp
fb0.enable=1
bmp /logo.bmp
- gpio_direction_out 1 1
+ gpio_set_value 1 1
fi
if [ -z $eth0.ethaddr ]; then
diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
index 63d019a..39490cc 100644
--- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
+++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
@@ -219,7 +219,7 @@ static int eukrea_cpuimx35_console_init(void)
ARRAY_SIZE(eukrea_cpuimx35_pads));
/* screen default on to prevent flicker */
- gpio_direction_output(4, 1);
+ gpio_direction_output(4, 0);
/* backlight default off */
gpio_direction_output(1, 0);
/* led default off */
diff --git a/arch/arm/boards/eukrea_cpuimx35/flash_header.c b/arch/arm/boards/eukrea_cpuimx35/flash_header.c
index 285a2d4..0cb493d 100644
--- a/arch/arm/boards/eukrea_cpuimx35/flash_header.c
+++ b/arch/arm/boards/eukrea_cpuimx35/flash_header.c
@@ -12,19 +12,18 @@ void __naked __flash_header_start go(void)
struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
{ .ptr_type = 4, .addr = 0x53F80004, .val = 0x00821000, },
{ .ptr_type = 4, .addr = 0x53F80004, .val = 0x00821000, },
- { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000004, },
- { .ptr_type = 4, .addr = 0xB8001010, .val = 0x0000000C, },
- { .ptr_type = 4, .addr = 0xB8001004, .val = 0x0009572B, },
- { .ptr_type = 4, .addr = 0xB8001000, .val = 0x92220000, },
- { .ptr_type = 1, .addr = 0x80000400, .val = 0xda, },
- { .ptr_type = 4, .addr = 0xB8001000, .val = 0xA2220000, },
- { .ptr_type = 1, .addr = 0x80000000, .val = 0x87654321, },
- { .ptr_type = 1, .addr = 0x80000000, .val = 0x87654321, },
- { .ptr_type = 4, .addr = 0xB8001000, .val = 0xB2220000, },
+ { .ptr_type = 4, .addr = 0xb8001010, .val = 0x00000004, },
+ { .ptr_type = 4, .addr = 0xb8001000, .val = 0x92100000, },
+ { .ptr_type = 1, .addr = 0x80000400, .val = 0x12344321, },
+ { .ptr_type = 4, .addr = 0xb8001000, .val = 0xa2100000, },
+ { .ptr_type = 4, .addr = 0x80000000, .val = 0x12344321, },
+ { .ptr_type = 4, .addr = 0x80000000, .val = 0x12344321, },
+ { .ptr_type = 4, .addr = 0xb8001000, .val = 0xb2100000, },
{ .ptr_type = 1, .addr = 0x80000033, .val = 0xda, },
- { .ptr_type = 1, .addr = 0x82000000, .val = 0xda, },
- { .ptr_type = 4, .addr = 0xB8001000, .val = 0x82224080, },
- { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000004, },
+ { .ptr_type = 1, .addr = 0x81000000, .val = 0xff, },
+ { .ptr_type = 4, .addr = 0xb8001000, .val = 0x82226080, },
+ { .ptr_type = 4, .addr = 0xb8001004, .val = 0x0009572B, },
+ { .ptr_type = 4, .addr = 0x53f80008, .val = 0x20034000, },
};
diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
index aad334d..6c0e106 100644
--- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
@@ -66,6 +66,7 @@ void __bare_init __naked board_init_lowlevel(void)
unsigned int *trg, *src;
int i;
#endif
+ register uint32_t loops = 0x20000;
r = get_cr();
r |= CR_Z; /* Flow prediction (Z) */
@@ -118,7 +119,7 @@ void __bare_init __naked board_init_lowlevel(void)
writel(r, ccm_base + CCM_CGR0);
r = readl(ccm_base + CCM_CGR1);
- r |= 0x00000C00;
+ r |= 0x00030C00;
r |= 0x00000003;
writel(r, ccm_base + CCM_CGR1);
@@ -132,31 +133,34 @@ void __bare_init __naked board_init_lowlevel(void)
board_init_lowlevel_return();
/* Init Mobile DDR */
+ writel(0x0000000E, ESDMISC);
writel(0x00000004, ESDMISC);
- writel(0x0000000C, ESDMISC);
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0" (loops));
+
writel(0x0009572B, ESDCFG0);
writel(0x92220000, ESDCTL0);
writeb(0xda, IMX_SDRAM_CS0 + 0x400);
writel(0xA2220000, ESDCTL0);
- writel(0x87654321, IMX_SDRAM_CS0);
- writel(0x87654321, IMX_SDRAM_CS0);
+ writeb(0xda, IMX_SDRAM_CS0);
+ writeb(0xda, IMX_SDRAM_CS0);
writel(0xB2220000, ESDCTL0);
writeb(0xda, IMX_SDRAM_CS0 + 0x33);
writeb(0xda, IMX_SDRAM_CS0 + 0x2000000);
- writel(0x82224080, ESDCTL0);
- writel(0x00000004, ESDMISC);
+ writel(0x82228080, ESDCTL0);
#ifdef CONFIG_NAND_IMX_BOOT
/* skip NAND boot if not running from NFC space */
r = get_pc();
- if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x1000)
+ if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x800)
board_init_lowlevel_return();
src = (unsigned int *)IMX_NFC_BASE;
trg = (unsigned int *)TEXT_BASE;
/* Move ourselves out of NFC SRAM */
- for (i = 0; i < 0x1000 / sizeof(int); i++)
+ for (i = 0; i < 0x800 / sizeof(int); i++)
*trg++ = *src++;
/* Jump to SDRAM */
--
1.7.0.4
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