> I tried getting barebox MX21ADS to boot from NAND, but I can't get > it to work. > > Any clues, anyone ? > + ldmia r0!, {r3-r9} /* copy from source address [r0] */ > + stmia r1!, {r3-r9} /* copy to target address [r1] */ This is 7 registers, so 28 bytes at a time. So you copy 28, 56, .... 2044, 2072 I don't know what happens when you access memory over the end of the SRAM area. Maybe it fires a data abort or something like that? I'd use 4 registers instead of 7, but it might well not be the problem > + cmp r0, r2 /* until source end addreee [r2] */ > + ble copy_loop "blt" would be better, because when it is equal you are done. Or using 4 registers will not prevent the extra accesses. > + ldr pc, =1f /* Jump to SDRAM */ > +1: > + bl nand_boot /* Load barebox from NAND Flash */ > + Finally, you should ensure the literary pool is within the first 2kB. I'd place ".ltorg" before the "1:", or would check the disassembly. Hope this helps, but it may well not help /alessandro, who has an mx21ads looking at him but also real work to deliver _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox