[PATCH v3.18.y .. v4.0.y] ARM: clk-imx6q: refine sata's parent

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From: Sebastien Szymanski <sebastien.szymanski@xxxxxxxxxxxx>

commit da946aeaeadcd24ff0cda9984c6fb8ed2bfd462a upstream.

According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg.

Signed-off-by: Sebastien Szymanski <sebastien.szymanski@xxxxxxxxxxxx>
Reviewed-by: Fabio Estevam <fabio.estevam@xxxxxxxxxxxxx>
Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
[dirk.behme: Adjust moved file]
Signed-off-by: Dirk Behme <dirk.behme@xxxxxxxxx>

--

Index: github_linux.git/arch/arm/mach-imx/clk-imx6q.c
===================================================================
--- github_linux.git.orig/arch/arm/mach-imx/clk-imx6q.c	2015-06-13 07:58:47.014097696 +0200
+++ github_linux.git/arch/arm/mach-imx/clk-imx6q.c	2015-06-13 07:58:47.010097695 +0200
@@ -439,7 +439,7 @@
 	clk[IMX6QDL_CLK_GPMI_IO]      = imx_clk_gate2("gpmi_io",       "enfc",              base + 0x78, 28);
 	clk[IMX6QDL_CLK_GPMI_APB]     = imx_clk_gate2("gpmi_apb",      "usdhc3",            base + 0x78, 30);
 	clk[IMX6QDL_CLK_ROM]          = imx_clk_gate2("rom",           "ahb",               base + 0x7c, 0);
-	clk[IMX6QDL_CLK_SATA]         = imx_clk_gate2("sata",          "ipg",               base + 0x7c, 4);
+	clk[IMX6QDL_CLK_SATA]         = imx_clk_gate2("sata",          "ahb",               base + 0x7c, 4);
 	clk[IMX6QDL_CLK_SDMA]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);
 	clk[IMX6QDL_CLK_SPBA]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);
 	clk[IMX6QDL_CLK_SPDIF]        = imx_clk_gate2("spdif",         "spdif_podf",        base + 0x7c, 14);
--
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