3.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Jim Bride <jim.bride@xxxxxxxxxxxxxxx> commit e058c945e03a629c99606452a6931f632dd28903 upstream. According to the HSW b-spec we need to try clock divisors of 63 and 72, each 3 or more times, when attempting DP AUX channel communication on a server chipset. This actually wasn't happening due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit in status rather than checking that the operation was done and that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set. [v2] Implemented alternate solution suggested by Jani Nikula. Signed-off-by: Jim Bride <jim.bride@xxxxxxxxxxxxxxx> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_dp.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -481,10 +481,8 @@ intel_dp_aux_ch(struct intel_dp *intel_d DP_AUX_CH_CTL_RECEIVE_ERROR)) continue; if (status & DP_AUX_CH_CTL_DONE) - break; + goto done; } - if (status & DP_AUX_CH_CTL_DONE) - break; } if ((status & DP_AUX_CH_CTL_DONE) == 0) { @@ -493,6 +491,7 @@ intel_dp_aux_ch(struct intel_dp *intel_d goto out; } +done: /* Check for timeout or receive error. * Timeouts occur when the sink is not connected */ -- To unsubscribe from this list: send the line "unsubscribe stable" in