This is a note to let you know that I've just added the patch titled
MIPS: OCTEON: Use correct CSR to soft reset
to the 4.0-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mips-octeon-use-correct-csr-to-soft-reset.patch
and it can be found in the queue-4.0 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From ralf@xxxxxxxxxxxxxx Fri May 8 16:24:22 2015
From: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Date: Fri, 6 Mar 2015 14:02:21 +0300
Subject: MIPS: OCTEON: Use correct CSR to soft reset
To: stable@xxxxxxxxxxxxxxx
Message-ID: <149fba8b175539836c311d54b41cb93778c49a82.1431087908.git.ralf@xxxxxxxxxxxxxx>
From: Chandrakala Chavva <cchavva@xxxxxxxxxxxxxxxxxx>
Commit 9a49899eb88803dcc0ef437f09912f9a7b7a66fd upstream.
Also delete unused cvmx_reset_octeon()
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva <cchavva@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Aleksey Makarov <aleksey.makarov@xxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
Cc: David Daney <david.daney@xxxxxxxxxx>
Patchwork: https://patchwork.linux-mips.org/patch/9471/
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/mips/cavium-octeon/setup.c | 5 ++++-
arch/mips/include/asm/octeon/cvmx.h | 8 --------
2 files changed, 4 insertions(+), 9 deletions(-)
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -413,7 +413,10 @@ static void octeon_restart(char *command
mb();
while (1)
- cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
+ if (OCTEON_IS_OCTEON3())
+ cvmx_write_csr(CVMX_RST_SOFT_RST, 1);
+ else
+ cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
}
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -436,14 +436,6 @@ static inline uint64_t cvmx_get_cycle_gl
/***************************************************************************/
-static inline void cvmx_reset_octeon(void)
-{
- union cvmx_ciu_soft_rst ciu_soft_rst;
- ciu_soft_rst.u64 = 0;
- ciu_soft_rst.s.soft_rst = 1;
- cvmx_write_csr(CVMX_CIU_SOFT_RST, ciu_soft_rst.u64);
-}
-
/* Return the number of cores available in the chip */
static inline uint32_t cvmx_octeon_num_cores(void)
{
Patches currently in stable-queue which might be from ralf@xxxxxxxxxxxxxx are
queue-4.0/mips-octeon-remove-udelay-causing-huge-irq-latency.patch
queue-4.0/mips-makefile-fix-mips-ase-detection-code.patch
queue-4.0/mips-r4kcache-use-correct-base-register-for-mips-r6-cache-flushes.patch
queue-4.0/mips-fix-cpu_has_mips_r2_exec_hazard.patch
queue-4.0/mips-ralink-fix-bad-config-symbol-in-pci-makefile.patch
queue-4.0/revert-mips-remove-race-window-in-page-fault-handling.patch
queue-4.0/mips-fix-race-condition-in-lazy-cache-flushing.patch
queue-4.0/mips-bcm63xx-move-bcm63xx_gpio_init-to-bcm63xx_register_devices.patch
queue-4.0/mips-octeon-delete-override-of-cpu_has_mips_r2_exec_hazard.patch
queue-4.0/mips-asm-spinlock-fix-addiu-instruction-for-r10000_llsc_war-case.patch
queue-4.0/mips-kconfig-disable-smp-cps-for-64-bit.patch
queue-4.0/mips-bcm47xx-fix-detecting-microsoft-mn-700-asus-wl500g.patch
queue-4.0/mips-octeon-use-correct-csr-to-soft-reset.patch
queue-4.0/revert-mips-avoid-pipeline-stalls-on-some-mips32r2-cores.patch
queue-4.0/mips-octeon-dma-octeon-fix-ohci-usb-config-check.patch
queue-4.0/mips-octeon-fix-pci-interrupt-mapping-for-d-link-dsr-1000n.patch
queue-4.0/mips-kconfig-fix-typo-for-the-r2-to-r6-emulator-kernel-parameter.patch
queue-4.0/ssb-fix-kconfig-dependencies.patch
queue-4.0/mips-kernel-entry.s-set-correct-isa-level-for-mips_ihb.patch
queue-4.0/mips-netlogic-fix-for-sata-phy-init.patch
queue-4.0/mips-ralink-add-missing-symbol-for-ralink_ill_acc.patch
queue-4.0/mips-asm-elf-set-o32-default-fpu-flags.patch
queue-4.0/mips-smp-cps-cpu_set-fpu-mask-if-fpu-present.patch
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