On Thu, 23 Apr 2015, Alexander Shishkin wrote: > The problem with using cycle counter for NMI watchdog is that its > frequency changes with the corresponding core's frequency. This means > that, in particular, if the core frequency scales up, watchdog NMI will > arrive more frequently than what user requested through watchdog_thresh > and also increasing the probability of setting off the hardlockup detector, > because the corresponding hrtimer will keep firing at the same intervals > regardless of the core frequency. And, if the core can turbo to up to 2.5x > its base frequency (and therefore TSC) [1], we'll have the hrtimer and NMI So you are saying that this M-5Y10 has a non-constant TSC again? You really can't be serious about that. Please provide the output of /proc/cpuinfo Thanks, tglx -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html